	.title Sean Riddle's Williams Emulation Test Suite
	;www.seanriddle.com
	;assembled with as6809
		;del willyemutest.bin
		;del willyemutest.rel
		;del willyemutest.s19
		;as6809 -l -o -s willyemutest.asm
		;aslink -s -m -u -b _CODED000=0xD000 -b _CODEE800=0xE800 -b _VECTORS=0xfff0 willyemutest.rel
		;srec_cat willyemutest.s19 -o willyemutest.bin -binary

	;2/8/2012 SKR created 
	;2/12/2012 V0.1 posted 	- 6809 instruction tests, 6 blitter speed tests
	;2/12/2012 V0.2 posted 	- added 5 more blitter speed tests from MAME log file
	;2/14/2012 V0.3 posted 	- normalized number of blitter loops to make each test about 1 minute
	;						- moved variables in memory
	;2/18/2012 V0.4 posted	- added instruction timing, changed a few blitter loop counts
	;						- added blit validation; does various blits, CRCs RAM to check
	;						- expanded to 12K: 0xD000-0xFFFF
	;3/8/2012 V0.5 	posted	- dumped post-blit test RAM
	;						- cleaned up code a bit

	;game hardware
	screen_end = 0x9800				;screen memory from $0000-$97FF
	ram_end = 0xc000				;RAM from $0000-$BFFF

	color_registers = 0xC000
	COLOR_BLUE = 0xc0
	COLOR_WHITE = 0xff

	widget_pia_dataa = 0xC804		;control panel
	widget_pia_ctrla = 0xC805
	widget_pia_datab = 0xC806
	widget_pia_ctrlb = 0xC807

	rom_pia_dataa = 0xC80C			;coin door and sound board
	rom_pia_ctrla = 0xC80D
	rom_pia_datab = 0xC80E
	rom_pia_ctrlb = 0xC80F

	rom_enable_scr_ctrl = 0xC900	;when D0=1, reads come from ROM, not RAM

	start_blitter = 0xCA00			;special chip registers
	blitter_mask = 0xCA01
	blitter_source = 0xCA02
	blitter_dest = 0xCA04
	blitter_w_h = 0xCA06

	vidctrs = 0xcb00				;beam position
	
	watchdog = 0xCBFF
	watchdog_data = 0x39

	stack = 0xbf00					;stack pointer

	EXTREG =   0xa000				;for 6809 test suite
	
	curpos = 0xb000					;cursor position for PSTRNG 2 bytes
	
	;for blitter speed test
	tmp_blitter_source = 0xb002		;2 bytes
	tmp_blitter_dest = 0xb004		;2 bytes
	tmp_blitter_w_h = 0xb006		;2 bytes
	tmp_blitter_mask = 0xb008		;1 byte
	tmp_start_blitter = 0xb009		;1 byte
	tmp_blitter_loops = 0xb00a		;1 byte
	
	failed_6809 = 0xb00a			;1 byte flag indicating 6809 test suite failed
	
	bigindx = 0xb00b				;2 bytes index for instruction timing loops

	crca = 0xb010					;4 bytes
	addra = 0xb014					;2 bytes
	numa = 0xb016					;2 bytes

	tmp = 0xb018					;1 byte

	crcb = 0xbff8					;4 bytes
	addrb = 0xbffc					;2 bytes
	numb = 0xbffe					;2 bytes

	PARPORT = 0xc900				;used for ROM dump
		
	.area	_CODED000				;this area will link at $D000
	
reset:
	orcc	#0xff
	lds		#stack					;set up stack pointer
	ldb		#watchdog_data
	stb		watchdog

	clr		rom_pia_ctrla			;setup ROM PIA
	clr		rom_pia_dataa
	lda		#0x3c
	sta		rom_pia_ctrla
	clr		rom_pia_ctrlb
	lda		#0xff
	sta		rom_pia_datab
	lda		#0x35
	sta		rom_pia_ctrlb
	lda		#0x3f
	sta		rom_pia_datab

	ldb		#0x09
	jsr		set_LED
	jsr		delay_2000
	ldb		#0x08
	jsr		set_LED
	jsr		delay_2000
	ldb		#0x07
	jsr		set_LED
	jsr		delay_2000
	ldb		#0x06
	jsr		set_LED
	jsr		delay_2000
	ldb		#0x05
	jsr		set_LED
	jsr		delay_2000
	ldb		#0x04
	jsr		set_LED
	jsr		delay_2000
	ldb		#0x03
	jsr		set_LED
	jsr		delay_2000
	ldb		#0x02
	jsr		set_LED
	jsr		delay_2000
	ldb		#0x01
	jsr		set_LED
	jsr		delay_2000
	ldb		#0x00
	jsr		set_LED
	jsr		delay_2000
	
	clr		widget_pia_ctrla		;setup widget PIA
	clr		widget_pia_ctrlb
	clr		widget_pia_dataa
	clr		widget_pia_datab
	lda		#0x34
	sta		widget_pia_ctrla
	lda		#0x3c					;select B controls for joystick
	sta		widget_pia_ctrlb

	lda		#0x01					;enable ROM
	sta		rom_enable_scr_ctrl

	ldb		#0x01
	jsr		set_LED

	jsr		clear_screen
	jsr		load_palette_graybkg

	ldx		#0x1c88
	stx		curpos
	LDX		#TITLEM1
	JSR		PSTRNG

	ldb		#watchdog_data
	jsr		delay_ffff
	jsr		delay_ffff
	jsr		delay_ffff
	jsr		clear_screen
	
	jsr		test6809	

	ldb		failed_6809
	bne		nosuccess

	ldb		#0x03
	jsr		set_LED
	
	jsr		load_palette_greenbkg

	ldx		#0x1c88
	stx		curpos
	LDX   	#PASSM1
	JSR   	PSTRNG
	
	ldb		#watchdog_data
	jsr		delay_ffff
	jsr		delay_ffff
	jsr		delay_ffff

nosuccess:	
	jsr		fadeout

;blitter validation
	jsr		clear_screen
	jsr		load_palette_bluebkg

	ldx		#0x1c88
	stx		curpos
	LDX		#BLITM1
	JSR		PSTRNG
	ldb		#watchdog_data
	jsr		delay_ffff

	ldy		#blit_test_start

blittest:

;set all colors to blue
	ldx		#color_registers
lp2a$:
	lda		vidctrs
	anda	#0xfc
	bne		lp2a$
lp1a$:
	lda		#COLOR_BLUE
	sta		,x+
	cmpx	#color_registers+0x10
	bne		lp1a$
	
	ldb		#watchdog_data
	jsr		delay_ffff

;first, clear all of memory so we can check for bad blits
;no subroutine calls after here so stack won't change memory contents

	lda		#0x00			;first 1/4 to 00
	ldx		#0x0000
1$:
	sta		,x+
	stb		watchdog
	cmpx	#0x3000
	bne		1$

	lda		#0xFF			;second 1/4 to FF
	ldx		#0x3000
2$:
	sta		,x+
	stb		watchdog
	cmpx	#0x6000
	bne		2$

	lda		#0xA5			;third 1/4 to A5
	ldx		#0x6000
3$:
	sta		,x+
	stb		watchdog
	cmpx	#0x9000
	bne		3$

	lda		#0x5A			;fourth 1/4 to 5A
	ldx		#0x9000
4$:
	sta		,x+
	stb		watchdog
	cmpx	#ram_end
	bne		4$

;set all colors to white
	ldx		#color_registers
lp2b$:
	lda		vidctrs
	anda	#0xfc
	bne		lp2b$
lp1b$:
	lda		#COLOR_WHITE
	sta		,x+
	cmpx	#color_registers+0x10
	bne		lp1b$
	
;now do blits and compare the CRC
	ldu		,y++				;# blits for this pass
	
timeloop:	
	lda		,y+
	sta		rom_enable_scr_ctrl
	ldx		,y++
	stx		blitter_source
	lda		,y+
	sta		blitter_mask
	ldx		,y++
	stx		blitter_dest
	ldx		,y++
	stx		blitter_w_h
	lda		,y+
	sta		start_blitter	

	leau	-1,u
	cmpu	#0x0000
	bne		timeloop
		
	lda		#0x00					;enable RAM
	sta		rom_enable_scr_ctrl

	ldx 	#0
	stx		addrb
	ldx		#0xffff
	stx 	crcb+0
	stx 	crcb+2
	ldx 	#0xbff8			;CRC nearly all of RAM (except 8 bytes CRC uses)
	stx		numb

;from http://mdfs.net/Info/Comp/Comms/CRC32.htm
; On entry, crc..crc+3   =  incoming CRC (0xFFFFFFFF)
;           addr..addr+1 => start address of data
;           num..num+1   =  number of bytes
; On exit,  crc..crc+3   =  updated CRC
;           addr..addr+1 => end of data+1
;           num..num+1   =  0

bytelp:
	ldb		#watchdog_data
	stb		watchdog
	LDX 	#8				;rotate CRC 8 bits
	LDA 	[addrb]			;get data byte

	;update the CRC with the byte in A	
	EORA 	crcb+0			;EOR byte into CRC lo byte
rotlp:
	LSR 	crcb+3			;rotate CRC clearing bit 31
	ROR 	crcb+2
	ROR 	crcb+1
	RORA
	BCC 	clear			;if bit 0 is 0, skip
	TFR 	a,b
	LDA 	crcb+3			;CRC ^= 0xEDB88320
	EORA 	#0xED
	STA 	crcb+3
	LDA 	crcb+2
	EORA 	#0xB8
	STA 	crcb+2
	LDA 	crcb+1
	EORA 	#0x83
	STA 	crcb+1
	TFR 	b,a
	EORA 	#0x20
clear:
	DEX
	BNE 	rotlp			;loop for 8 bits
	
	INC 	addrb+1			;next byte of data
	BNE 	next
	INC 	addrb+0
next:
	STA 	crcb+0			;store CRC low byte
	LDA 	numb+1			;subtract one from byte count
	BNE 	skip
	DEC 	numb+0
skip:
	DEC 	numb+1
	BNE 	bytelp
	LDA 	numb+0
	BNE 	bytelp

;	ldu		#ram_end		;end
;	stu		numb
;	ldu		#0x0000			;start
;	jmp		dumpram			;get a RAM dump to compare to emulators that fail the test
	
passdone:
;compare CRCs
	lda		crcb+0
	cmpa	,y+
	bne		badcrc0
	lda		crcb+1
	cmpa	,y+
	bne		badcrc1
	lda		crcb+2
	cmpa	,y+
	bne		badcrc2
	lda		crcb+3
	cmpa	,y+
	bne		badcrc3

resumeblittest:
	cmpy	#blit_test_end	
	lblt	blittest
	
	bra		blittimingdone

badcrc0:
	lda		,y+
badcrc1:
	lda		,y+
badcrc2:	
	lda		,y+
badcrc3:
	sty		numb
	
	ldb		#0x04
	jsr		set_LED

	jsr		clear_screen
	jsr		load_palette_redbkg
	ldx		#0x1c88
	stx		curpos
	LDX		#CRCBADM1
	JSR		PSTRNG

	ldx		#0x3c99
	stx		curpos
	lda 	crcb+0
	jsr		PHEX
	lda 	crcb+1
	jsr		PHEX
	lda 	crcb+2
	jsr		PHEX
	lda 	crcb+3
	jsr		PHEX

	ldb		#watchdog_data
	jsr		delay_ffff
	jsr		delay_ffff
	jsr		delay_ffff
	jsr		delay_ffff
	jsr		delay_ffff
	jsr		delay_ffff
	ldy		numb
	bra		resumeblittest
			
blittimingdone:
	lda		#0x01					;enable ROM
	sta		rom_enable_scr_ctrl

	jsr		clear_screen
	jsr		load_palette_bluebkg

	ldx		#0x1c88
	stx		curpos
	LDX		#BLITM2
	JSR		PSTRNG
	ldb		#watchdog_data
	jsr		delay_ffff

;blitter timing tests
	ldy		#blit_time_start
blitloop:
	pshs	y
	jsr		load_palette_allwhite
	puls	y

	ldx		,y++
	stx		tmp_blitter_source
	lda		,y+
	sta		tmp_blitter_mask
	ldx		,y++
	stx		tmp_blitter_dest
	ldx		,y++
	stx		tmp_blitter_w_h
	lda		,y+
	sta		tmp_start_blitter	
	lda		,y+	
	sta		tmp_blitter_loops	;this many loops of 65535...
	ldx		,y++				;...plus this many more loops

	ldb		#watchdog_data
1$:
	stb		watchdog
	pshs	x					;loops remaining
	
	ldx		tmp_blitter_source
	stx		blitter_source
	lda		tmp_blitter_mask
	sta		blitter_mask
	ldx		tmp_blitter_dest
	stx		blitter_dest
	ldx		tmp_blitter_w_h
	stx		blitter_w_h
	lda		tmp_start_blitter
	sta		start_blitter	
	
	puls	x
	leax	0xffff,x
	bne		1$
	
	lda		tmp_blitter_loops
	beq		blitter_pass_done
	
	suba	#0x01
	sta		tmp_blitter_loops
	
	ldx		#0xffff
	
	bra		1$

blitter_pass_done:
	pshs	y
	jsr		load_palette_allblue

	ldb		#watchdog_data
	jsr		delay_ffff

	puls	y
	cmpy	#blit_time_end	
	blt		blitloop

skipblits:
	jsr		clear_screen
	jsr		load_palette_purplebkg

	ldx		#0x1c88
	stx		curpos
	LDX		#INSTM1
	JSR		PSTRNG
	ldb		#watchdog_data
	jsr		delay_ffff


;instruction timing tests
	ldy		#inst_paras_start
instloop:
	pshs	y
	jsr		load_palette_allwhite
	puls	y
	ldx		#0xb100
	lda		,y+
	ldb		#watchdog_data
	stb		watchdog

instloop1:
	sta		,x+
	cmpx	#0xb200
	bne		instloop1	
	lda		#0x39		;RTS
	sta		0xb200	
	ldx		,y++
	stx		bigindx
	ldx		,y++

instloop2:
	pshs	x
	jsr		0xb100
	ldb		#watchdog_data
	stb		watchdog
	puls	x
	leax	-1,x
	bne		instloop2

	ldx		bigindx
	beq		inst_pass_done
	leax	-1,x
	stx		bigindx
	ldx		#0xffff
	bra		instloop2
	
inst_pass_done:
	pshs	y
	jsr		load_palette_allpurple

	ldb		#watchdog_data
	jsr		delay_ffff

	puls	y
	cmpy	#inst_paras_end	
	blt		instloop

	jsr		clear_screen
	jsr		load_palette_greenbkg

	
spin:
	ldb		#watchdog_data
	stb		watchdog
	bra		spin


;blitter validation parameters
blit_test_start:
			;source	1=ROM				mask	dest		w/h			flags
	.byte	0,192									;# of blits in this pass
	
	;0x0000 - pre-filled with 00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x00,0x00,	0x14,0x14,	0x00	;various w/h, all 1024 bytes
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x01,0x00,	0x24,0x0c,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x02,0x00,	0x44,0x00,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x03,0x00,	0x84,0x06,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x04,0x00,	0x0c,0x24,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x05,0x00,	0x00,0x44,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x06,0x00,	0x06,0x84,	0x00
	
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x07,0x00,	0x14,0x14,	0x08	;various flags
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x08,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x09,0x00,	0x14,0x14,	0x20
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x0a,0x00,	0x14,0x14,	0x40
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x0b,0x00,	0x14,0x14,	0x80
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x0c,0x00,	0x14,0x14,	0xb8
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x0d,0x00,	0x14,0x14,	0x78
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x0e,0x00,	0x14,0x14,	0x04
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x0f,0x00,	0x14,0x14,	0x88

	.byte	1,	>#blitdata, <#blitdata,	0x00,	0x10,0x00,	0x14,0x14,	0x10	;various masks
	.byte	1,	>#blitdata, <#blitdata,	0x11,	0x11,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x22,	0x12,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x33,	0x13,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x44,	0x14,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x55,	0x15,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x66,	0x16,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x77,	0x17,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x88,	0x18,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x99,	0x19,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xaa,	0x1a,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xbb,	0x1b,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xcc,	0x1c,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xdd,	0x1d,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xee,	0x1e,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x1f,0x00,	0x14,0x14,	0x10

	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x20,0x00,	0x04,0x04,	0x08	;various w/h, different sizes
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x21,0x00,	0x04,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x22,0x00,	0x04,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x23,0x00,	0x04,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x24,0x00,	0x05,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x25,0x00,	0x05,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x26,0x00,	0x05,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x27,0x00,	0x05,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x28,0x00,	0x06,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x29,0x00,	0x06,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x2a,0x00,	0x06,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x2b,0x00,	0x06,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x2c,0x00,	0x07,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x2d,0x00,	0x07,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x2e,0x00,	0x07,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x2f,0x00,	0x07,0x07,	0x08


			;source 1=ROM				mask	dest		w/h			flags
	;0x3000 - pre-filled with ff
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x30,0x00,	0x14,0x14,	0x00	;various w/h, all 1024 bytes
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x31,0x00,	0x24,0x0c,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x32,0x00,	0x44,0x00,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x33,0x00,	0x84,0x06,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x34,0x00,	0x0c,0x24,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x35,0x00,	0x00,0x44,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x36,0x00,	0x06,0x84,	0x00
	
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x37,0x00,	0x14,0x14,	0x08	;various flags
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x38,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x39,0x00,	0x14,0x14,	0x20
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x3a,0x00,	0x14,0x14,	0x40
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x3b,0x00,	0x14,0x14,	0x80
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x3c,0x00,	0x14,0x14,	0xb8
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x3d,0x00,	0x14,0x14,	0x78
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x3e,0x00,	0x14,0x14,	0x04
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x3f,0x00,	0x14,0x14,	0x88

	.byte	1,	>#blitdata, <#blitdata,	0x00,	0x40,0x00,	0x14,0x14,	0x10	;various masks
	.byte	1,	>#blitdata, <#blitdata,	0x11,	0x41,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x22,	0x42,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x33,	0x43,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x44,	0x44,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x55,	0x45,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x66,	0x46,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x77,	0x47,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x88,	0x48,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x99,	0x49,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xaa,	0x4a,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xbb,	0x4b,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xcc,	0x4c,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xdd,	0x4d,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xee,	0x4e,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x4f,0x00,	0x14,0x14,	0x10
	
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x50,0x00,	0x04,0x04,	0x08	;various w/h, different sizes
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x51,0x00,	0x04,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x52,0x00,	0x04,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x53,0x00,	0x04,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x54,0x00,	0x05,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x55,0x00,	0x05,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x56,0x00,	0x05,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x57,0x00,	0x05,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x58,0x00,	0x06,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x59,0x00,	0x06,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x5a,0x00,	0x06,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x5b,0x00,	0x06,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x5c,0x00,	0x07,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x5d,0x00,	0x07,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x5e,0x00,	0x07,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x5f,0x00,	0x07,0x07,	0x08

			;source 1=ROM				mask	dest		w/h			flags
	;0x6000 - pre-filled with A5
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x60,0x00,	0x14,0x14,	0x00	;various w/h, all 1024 bytes
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x61,0x00,	0x24,0x0c,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x62,0x00,	0x44,0x00,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x63,0x00,	0x84,0x06,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x64,0x00,	0x0c,0x24,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x65,0x00,	0x00,0x44,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x66,0x00,	0x06,0x84,	0x00
	
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x67,0x00,	0x14,0x14,	0x08	;various flags
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x68,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x69,0x00,	0x14,0x14,	0x20
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x6a,0x00,	0x14,0x14,	0x40
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x6b,0x00,	0x14,0x14,	0x80
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x6c,0x00,	0x14,0x14,	0xb8
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x6d,0x00,	0x14,0x14,	0x78
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x6e,0x00,	0x14,0x14,	0x04
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x6f,0x00,	0x14,0x14,	0x88

	.byte	1,	>#blitdata, <#blitdata,	0x00,	0x70,0x00,	0x14,0x14,	0x10	;various masks
	.byte	1,	>#blitdata, <#blitdata,	0x11,	0x71,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x22,	0x72,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x33,	0x73,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x44,	0x74,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x55,	0x75,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x66,	0x76,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x77,	0x77,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x88,	0x78,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x99,	0x79,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xaa,	0x7a,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xbb,	0x7b,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xcc,	0x7c,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xdd,	0x7d,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xee,	0x7e,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x7f,0x00,	0x14,0x14,	0x10

	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x80,0x00,	0x04,0x04,	0x08	;various w/h, different sizes
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x81,0x00,	0x04,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x82,0x00,	0x04,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x83,0x00,	0x04,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x84,0x00,	0x05,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x85,0x00,	0x05,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x86,0x00,	0x05,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x87,0x00,	0x05,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x88,0x00,	0x06,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x89,0x00,	0x06,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x8a,0x00,	0x06,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x8b,0x00,	0x06,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x8c,0x00,	0x07,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x8d,0x00,	0x07,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x8e,0x00,	0x07,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x8f,0x00,	0x07,0x07,	0x08

			;source 1=ROM				mask	dest		w/h			flags
	;0x9000 - pre-filled with 5A
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x90,0x00,	0x14,0x14,	0x00	;various w/h, all 1024 bytes
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x91,0x00,	0x24,0x0c,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x92,0x00,	0x44,0x00,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x93,0x00,	0x84,0x06,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x94,0x00,	0x0c,0x24,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x95,0x00,	0x00,0x44,	0x00
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x96,0x00,	0x06,0x84,	0x00
	
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x97,0x00,	0x14,0x14,	0x08	;various flags
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x98,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x99,0x00,	0x14,0x14,	0x20
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x9a,0x00,	0x14,0x14,	0x40
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x9b,0x00,	0x14,0x14,	0x80
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x9c,0x00,	0x14,0x14,	0xb8
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x9d,0x00,	0x14,0x14,	0x78
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x9e,0x00,	0x14,0x14,	0x04
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x9f,0x00,	0x14,0x14,	0x88

	.byte	1,	>#blitdata, <#blitdata,	0x00,	0xa0,0x00,	0x14,0x14,	0x10	;various masks
	.byte	1,	>#blitdata, <#blitdata,	0x11,	0xa1,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x22,	0xa2,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x33,	0xa3,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x44,	0xa4,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x55,	0xa5,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x66,	0xa6,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x77,	0xa7,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x88,	0xa8,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0x99,	0xa9,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xaa,	0xaa,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xbb,	0xab,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xcc,	0xac,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xdd,	0xad,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xee,	0xae,0x00,	0x14,0x14,	0x10
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xaf,0x00,	0x14,0x14,	0x10

	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb0,0x00,	0x04,0x04,	0x08	;various w/h, different sizes
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb1,0x00,	0x04,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb2,0x00,	0x04,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb3,0x00,	0x04,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb4,0x00,	0x05,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb5,0x00,	0x05,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb6,0x00,	0x05,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb7,0x00,	0x05,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb8,0x00,	0x06,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb9,0x00,	0x06,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xba,0x00,	0x06,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xbb,0x00,	0x06,0x07,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xbc,0x00,	0x07,0x04,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xbd,0x00,	0x07,0x05,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xbe,0x00,	0x07,0x06,	0x08
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xbf,0x00,	0x07,0x07,	0x08

	.byte	0x86,0x4d,0x82,0x98						;CRC for this pass

	.byte	0,21									;# of blits in this pass
			;source 1=ROM				mask	dest		w/h			flags
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xff,0xf0,	0x14,0x14,	0x00	;wraps FFF0-00EF
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x01,0x01,	0x14,0x14,	0x00	;odd dest address
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x03,0x00,	0x0b,0x0b,	0x00	;odd w/h
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x04,0x00,	0x14,0x14,	0x00	;normal
	.byte	0,	0x04,0x00,				0xff,	0x04,0x80,	0x14,0x14,	0x04	;sync overlapping source/dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x06,0x00,	0x14,0x14,	0x00	;normal
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x07,0x00,	0x14,0x14,	0x00	;normal
	.byte	0,	0x06,0x80,				0xff,	0x06,0x00,	0x14,0x14,	0x04	;sync overlapping source/dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x08,0x00,	0xfb,0x04,	0x00	;256x1
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x09,0x00,	0x04,0xfb,	0x00	;1x256
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x10,0x00,	0x14,0x14,	0x02	;screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x20,0x00,	0x14,0x14,	0x1a	;solid FG screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x30,0x00,	0x14,0x14,	0x0a	;FG screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x40,0x00,	0x14,0x14,	0x2a	;shifted FG screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x50,0x00,	0x14,0x14,	0x56	;even solid sync screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x60,0x00,	0x14,0x14,	0x46	;even sync screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x70,0x00,	0x14,0x14,	0x02	;screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x80,0x00,	0x14,0x14,	0x1a	;solid FG screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0x90,0x00,	0x14,0x14,	0x0a	;FG screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xa0,0x00,	0x14,0x14,	0x2a	;shifted FG screen dest
	.byte	1,	>#blitdata, <#blitdata,	0xff,	0xb0,0x00,	0x14,0x14,	0x56	;even solid sync screen dest	

	.byte	0x1e,0xc7,0xa2,0x52						;CRC for this pass

	.byte	0,1										;# of blits in this pass
			;source	1=ROM	mask	dest		w/h			flags
	.byte	0,	0x00, 0x00,	0xff,	0x01,0x01,	0xd9,0xd9,	0x04	;RAM big blit 48841 bytes
	
	.byte	0x11,0xc7,0x71,0x75						;CRC for this pass
blit_test_end:

	;Bit 0 =linear/screen source	1
	;Bit 1 =linear/screen dest		2
	;Bit 2 sync for blits from RAM, slowing 	4
	;Bit 3 tells the blitter only to blit the foreground	8
	;Bit 4 is 'solid' mode.	10
	;Bit 5 shifts the image one pixel to the right	20
	;Bit 6 says even only, bit 7 says odd only	40/80

;blitter timing parameters
blit_time_start:

			;source addr,	mask, 	dest addr, 	w/ht,		mode,	#loops
	.byte	0xf0, 0x00, 	0xff,	0x3c,0x99,	0x24,0x24,	0x02,	0x00,0xd0,0x68
			;ROM-RAM, lin src, scr dst - 60.2s actual, 60.2s in MAME0145 64-bit
			
	.byte	0x00, 0x00, 	0xff,	0x3c,0x99,	0x24,0x24,	0x06,	0x00,0x6d,0x2a
			;RAM-RAM, RAM, lin src, scr dst - 60.4s actual, 32.0s in MAME0145 64-bit
			
	.byte	0x00, 0x00, 	0xff,	0x3c,0x99,	0x24,0x24,	0x07,	0x00,0x6d,0x2a
			;RAM-RAM, RAM, scr src, scr dst - 60.4s actual, 32.0s in MAME0145 64-bit
			
	.byte	0xd0, 0x00, 	0xff,	0x3c,0x99,	0x24,0x24,	0x02,	0x00,0xd0,0x68
			;Sin SRAM-RAM, lin src, scr dst - 60.2s actual, 60.2s in MAME0145 64-bit
			
	.byte	0xd0, 0x00, 	0xff,	0x3c,0x99,	0x24,0x24,	0x03,	0x00,0xd0,0x68
			;Sin SRAM-RAM, scr src, scr dst - 60.2s actual, 60.2s in MAME0145 64-bit
			
	.byte	0xf0, 0x00, 	0x11,	0x3c,0x99,	0x24,0x24,	0x02,	0x00,0xd0,0x68
			;ROM-RAM, lin src, scr dst - 60.2s actual, 60.2s in MAME0145 64-bit

;the following masks, widths/heights and modes are taken from a MAME log for a Robotron game
;so they should be a representative sample

			;source addr,	mask, 	dest addr, 	w/ht,		mode,	#loops
	.byte	0xf0, 0x00, 	0x99,	0x3c,0x99,	0x07,0x02,	0x1a,	0x08,0x9a,0xa4
			;ROM-RAM, solid FG, lin src, scr dst - 60.2s actual, 60.2s MAME0145 64-bit
	
	.byte	0xf0, 0x00, 	0x00,	0x3c,0x99,	0x01,0x09,	0x0a,	0x05,0xf3,0xc8
			;ROM-RAM, FG, lin src, scr dst - 60.2s actual, 60.2s in MAME0145 64-bit
	
	.byte	0xf0, 0x00, 	0x00,	0x3c,0x99,	0x0c,0x0b,	0x2a,	0x04,0x5d,0x01
			;ROM-RAM, Shift FG, lin src, scr dst - 60.2s actual, 60.2s MAME0145 64-bit
														
	.byte	0x00, 0x00, 	0x00,	0x3c,0x99,	0x05,0x09,	0x56,	0x08,0x06,0xa2
			;RAM-RAM, Even Solid RAM, lin src, scr dst - 60.2s actual, 54.5s MAME0145 64-bit
														
	.byte	0x00, 0x00, 	0x46,	0x3c,0x99,	0x05,0x08,	0x46,	0x08,0x44,0x8b
			;RAM-RAM, Even RAM, lin src, scr dst - 60.2s actual, 54.5s in MAME0145 64-bit
	
blit_time_end:


;instruction timing parameters
inst_paras_start:
			;opcode	#loops
	.byte	0x12,	0x00,0x01,0x9f,0x8e		;NOP	59.8s actual, 59.9 in MAME0145 64-bit
	.byte	0x4f,	0x00,0x01,0x9f,0x8e		;CLRA	59.8s actual, 59.9 in MAME0145 64-bit
	.byte	0x43,	0x00,0x01,0x9f,0x8e		;COMA	59.8s actual, 59.9 in MAME0145 64-bit
	.byte	0x19,	0x00,0x01,0x9f,0x8e		;DAA	59.8s actual, 59.9 in MAME0145 64-bit
	.byte	0x4d,	0x00,0x01,0x9f,0x8e		;TSTA	59.8s actual, 59.9 in MAME0145 64-bit
	
inst_paras_end:


	;subroutines

dumpram:							;bit-bangs RAM buffer from U to numb - uses A, B, X, U
LEDON:
	ldb		#0x08
	tfr		b,a
	lsla
	lsla
	lsla
	lsla
	lsla
	lsla
	sta		rom_pia_datab			;set bits A & B
	tfr		b,a
	anda	#0x08
	ora		#0x34					;select Cx2 as output
	sta		rom_pia_ctrla			;set bit D
	tfr		b,a
	lsla
	anda	#0x08
	ora		#0x34
	sta		rom_pia_ctrlb			;set bit C

	lda		#0x02					;enable RAM, trigger ROM dump w/screen flip
	sta		rom_enable_scr_ctrl

parbyteout:
	ldb		#watchdog_data
	stb		watchdog
	
	lda		,u
	anda	#0xf0
	sta		PARPORT

	ldx		#0x0020
$delay1:
	leax 	-1,x
	bne		$delay1

	lda		,u+
	rola
	rola
	rola
	rola
	anda	#0xf0
	sta		PARPORT

	ldx		#0x0020
$delay2:
	leax 	-1,x
	bne		$delay2
		
	cmpu	numb
	bne		parbyteout

	lda		#0x01					;enable ROM
	sta		rom_enable_scr_ctrl


LEDOFF:
	ldb		#0x0f
	tfr		b,a
	lsla
	lsla
	lsla
	lsla
	lsla
	lsla
	sta		rom_pia_datab			;set bits A & B
	tfr		b,a
	anda	#0x08
	ora		#0x34					;select Cx2 as output
	sta		rom_pia_ctrla			;set bit D
	tfr		b,a
	lsla
	anda	#0x08
	ora		#0x34
	sta		rom_pia_ctrlb			;set bit C
	
;	rts
	jmp		passdone


;delays - must ldb #watchdog_data before calling
delay_ffff:
	ldx		#0xffff
	bra		delay_x
delay_2000:
	ldx		#0x2000
	bra		delay_x
delay_600:
	ldx		#0x0600
	bra		delay_x
delay_300:
	ldx		#0x0300
delay_x:
	stb		watchdog
	leax	0xffff,x
	bne		delay_x
	rts
	

clear_screen:						;write 0x00 to 0x0000-0x97ff
	lda		#0x00
fill_screen:
	ldx		#0x0000
1$:
	sta		,x+
	stb		watchdog
	cmpx	#screen_end
	bne		1$
	rts


load_palette_allblack:
	ldy		#allblack
load_palette:						;load palette from y
	ldx		#color_registers
2$:
	lda		vidctrs
	anda	#0xfc
	bne		2$
1$:
	lda		,y+
	sta		,x+
	cmpx	#color_registers+0x10
	bne		1$
	rts
			
load_mypalette:
	ldy		#mypalette
	bra		load_palette

load_dimpalette:
	ldy		#dimpalette
	bra		load_palette

load_palette2:
	ldy		#palette2
	bra		load_palette

load_palette_redbkg:
	ldy		#redbkg
	bra		load_palette

load_palette_bluebkg:
	ldy		#bluebkg
	bra		load_palette

load_palette_purplebkg:
	ldy		#purplebkg
	bra		load_palette

load_palette_allpurple:
	ldy		#allpurple
	bra		load_palette

load_palette_greenbkg:
	ldy		#greenbkg
	bra		load_palette

load_palette_graybkg:
	ldy		#graybkg
	bra		load_palette

load_palette_allgreen:
	ldy		#allgreen
	bra		load_palette

load_palette_allblue:
	ldy		#allblue
	bra		load_palette

load_palette_allwhite:
	ldy		#allwhite
	bra		load_palette


;colors are BB GGG RRR
fadein:								;mask with 00, 09, 52, 5b, a4, ad, f6 and ff
	ldb		#0x00
2$:
	ldy		#mypalette
	ldx		#color_registers
6$:
	lda		vidctrs					;sync to video vert blank
	anda	#0xfc
	bne		6$
1$:
	tfr		b,a
	anda	,y+
	sta		,x+
	cmpx	#color_registers+0x10
	bne		1$
	tfr		b,a
	ldb		#watchdog_data
	jsr		delay_300
	tfr		a,b
	cmpb	#0xff
	beq		5$
	cmpb	#0x09
	beq		3$
	cmpb	#0x5b
	beq		3$
	cmpb	#0xad
	bne		4$
3$:
	addb	#0x40
4$:
	addb	#0x09
	bra 	2$
5$:
	ldb		#watchdog_data
	rts

	
fadeout:							;mask with ff, f6, ad, a4, 5b, 52, 09 and 00
	ldb		#0xff
2$:
	ldy		#mypalette
	ldx		#color_registers
6$:
	lda		vidctrs					;sync to video vert blank
	anda	#0xfc
	bne		6$
1$:
	tfr		b,a
	anda	,y+
	sta		,x+
	cmpx	#color_registers+0x10
	bne		1$
	tfr		b,a
	ldb		#watchdog_data
	jsr		delay_300
	tfr		a,b
	cmpb	#0x00
	beq		5$
	cmpb	#0xf6
	beq		3$
	cmpb	#0xa4
	beq		3$
	cmpb	#0x52
	bne		4$
3$:
	subb	#0x40
4$:
	subb	#0x09
	bra 	2$
5$:
	ldb		#watchdog_data
	rts


set_LED:
	andb	#0x0f
	tfr		b,a
	lsla
	lsla
	lsla
	lsla
	lsla
	lsla
	sta		rom_pia_datab			;set bits A & B
	tfr		b,a
	anda	#0x08
	ora		#0x34					;select Cx2 as output
	sta		rom_pia_ctrla			;set bit D
	tfr		b,a
	lsla
	anda	#0x08
	ora		#0x34
	sta		rom_pia_ctrlb			;set bit C
	ldb		#watchdog_data
	rts


PSTRNG:			;print string in X terminated with null
	lda		,x+
	beq		$pexit
	pshs 	x
	jsr		pchar
	puls	x
	bra		PSTRNG
$pexit:		rts


PHEX:			;print value in A in hex
	sta		tmp
	rora		
	rora		
	rora		
	rora		
	anda	#0x0f
	cmpa	#0x0a
	blt		$1a
	adda	#0x07
$1a:
	adda	#0x30
	jsr		pchar
	
	lda		tmp
	anda	#0x0f
	cmpa	#0x0a
	blt		$2a
	adda	#0x07
$2a:
	adda	#0x30
	jmp		pchar


pchar:			;a=ascii char to print, from space to underscore
	cmpa	#0x20
	blt		badchar
	cmpa	#0x60
	blt		goodchar

badchar:
	ldx		#badfont
	bra		blitchar
	
goodchar:
	ldx		#font
	suba	#0x20					;space is first char
	ldb		#0x0a
	mul								;index into font table; 2 bytes wide, 5 bytes tall = 10 bytes per char
	leax	d,x
	
blitchar:
	stx		blitter_source
	lda		#0xff					;replace the current contents
	sta		blitter_mask
	ldx		curpos
	stx		blitter_dest
	ldx		#0x0601					;width and height XOR 0x04 - 2 x 5 bytes = 4 x 5 pixels, 3x5 active w/spaces
	stx		blitter_w_h
	lda		#0x1a					;start blit solid, foreground, linear to screen layout
	sta		start_blitter
	ldx 	curpos
	leax	0x0300,x				;move cursor right 1 char
	stx		curpos
	rts


	;data
	
	;color palettes

mypalette:							;normal palette
	.byte 0x00,0xff,0x07,0x05,0x38,0xc7,0xc0,0x80,0xa4,0xe8,0x14,0x90,0x3f,0x51,0x0a,0x67
	;		k	w	R	 dk.r   G  purp blue dkbl gray skbl brn  slt   yel dkslt dkbrn salmon

dimpalette:							;darker colors
	.byte 0x00,0xa4,0x04,0x03,0x20,0x84,0x80,0x40,0x52,0x98,0x0a,0x48,0x24,0x08,0x01,0x14

palette2:							;other colors
	.byte 0x00,0x02,0x10,0x40,0x04,0x20,0x80,0xff,0xf6,0xa4,0x52,0x3f,0xc7,0xf8,0xa7,0xbc

allred:
	.byte 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
	
redbkg:
	.byte 0x07,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff

bluebkg:
	.byte 0xc0,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff

greenbkg:
	.byte 0x38,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff

purplebkg:
	.byte 0xc7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff

graybkg:
	.byte 0xa4,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff

allgreen:
	.byte 0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38

allblack:
	.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00

allwhite:
	.byte 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff

allblue:
	.byte 0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0

allpurple:
	.byte 0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7,0xc7


font:
	.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00	;space
	.byte 0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x01,0x00	;!
	.byte 0x10,0x10,0x10,0x10,0x00,0x00,0x00,0x00,0x00,0x00	;"
	.byte 0x10,0x10,0x11,0x10,0x10,0x10,0x11,0x10,0x10,0x10	;#
	.byte 0x11,0x10,0x11,0x00,0x11,0x10,0x01,0x10,0x11,0x10	;$
	.byte 0x10,0x00,0x00,0x10,0x01,0x00,0x10,0x00,0x00,0x10	;%
	.byte 0x01,0x10,0x10,0x00,0x01,0x00,0x10,0x10,0x01,0x00	;&
	.byte 0x01,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00	;'
	.byte 0x00,0x10,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x10	;(
	.byte 0x10,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x10,0x00	;)
	.byte 0x01,0x00,0x10,0x10,0x01,0x00,0x10,0x10,0x00,0x00	;*
	.byte 0x00,0x00,0x01,0x00,0x11,0x10,0x01,0x00,0x00,0x00	;+
	.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x10,0x00	;,
	.byte 0x00,0x00,0x00,0x00,0x11,0x10,0x00,0x00,0x00,0x00	;-
	.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x01,0x00	;.
	.byte 0x00,0x10,0x00,0x10,0x01,0x00,0x10,0x00,0x10,0x00	;/

	.byte 0x11,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x11,0x10	;0
	.byte 0x01,0x00,0x11,0x00,0x01,0x00,0x01,0x00,0x11,0x10
	.byte 0x11,0x10,0x00,0x10,0x11,0x10,0x10,0x00,0x11,0x10
	.byte 0x11,0x10,0x00,0x10,0x11,0x10,0x00,0x10,0x11,0x10 
	.byte 0x10,0x10,0x10,0x10,0x11,0x10,0x00,0x10,0x00,0x10
	.byte 0x11,0x10,0x10,0x00,0x11,0x10,0x00,0x10,0x11,0x10	;5
	.byte 0x11,0x10,0x10,0x00,0x11,0x10,0x10,0x10,0x11,0x10
	.byte 0x11,0x10,0x00,0x10,0x01,0x00,0x01,0x00,0x01,0x00 
	.byte 0x11,0x10,0x10,0x10,0x11,0x10,0x10,0x10,0x11,0x10
	.byte 0x11,0x10,0x10,0x10,0x11,0x10,0x00,0x10,0x00,0x10	;9
	
	.byte 0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00	;:
	.byte 0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x10,0x00	;;
	.byte 0x00,0x10,0x01,0x00,0x10,0x00,0x01,0x00,0x00,0x10	;<
	.byte 0x00,0x00,0x11,0x10,0x00,0x00,0x11,0x10,0x00,0x00	;=
	.byte 0x10,0x00,0x01,0x00,0x00,0x10,0x01,0x00,0x10,0x00	;>
	.byte 0x01,0x00,0x10,0x10,0x00,0x10,0x01,0x00,0x01,0x00	;?
	.byte 0x01,0x00,0x10,0x10,0x11,0x00,0x10,0x00,0x01,0x10	;@
	
	.byte 0x11,0x10,0x10,0x10,0x11,0x10,0x10,0x10,0x10,0x10 ;A
	.byte 0x11,0x10,0x10,0x10,0x11,0x00,0x10,0x10,0x11,0x10
	.byte 0x11,0x10,0x10,0x00,0x10,0x00,0x10,0x00,0x11,0x10
	.byte 0x11,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x11,0x00
	.byte 0x11,0x10,0x10,0x00,0x11,0x00,0x10,0x00,0x11,0x10 
	.byte 0x11,0x10,0x10,0x00,0x11,0x00,0x10,0x00,0x10,0x00 
	.byte 0x11,0x10,0x10,0x00,0x10,0x10,0x10,0x10,0x11,0x10
	.byte 0x10,0x10,0x10,0x10,0x11,0x10,0x10,0x10,0x10,0x10
	.byte 0x11,0x10,0x01,0x00,0x01,0x00,0x01,0x00,0x11,0x10
	.byte 0x00,0x10,0x00,0x10,0x00,0x10,0x10,0x10,0x11,0x10
	.byte 0x10,0x10,0x10,0x10,0x11,0x00,0x10,0x10,0x10,0x10
	.byte 0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x11,0x10	;L
	.byte 0x11,0x10,0x11,0x10,0x11,0x10,0x10,0x10,0x10,0x10	;my skinny M
	.byte 0x11,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10
	.byte 0x11,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x11,0x10	;O same as 0
	.byte 0x11,0x10,0x10,0x10,0x11,0x10,0x10,0x00,0x10,0x00
	.byte 0x11,0x10,0x10,0x10,0x10,0x10,0x01,0x00,0x00,0x10
	.byte 0x11,0x10,0x10,0x10,0x11,0x00,0x10,0x10,0x10,0x10
	.byte 0x11,0x10,0x10,0x00,0x11,0x10,0x00,0x10,0x11,0x10	;S same as 5
	.byte 0x11,0x10,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00
	.byte 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x11,0x10
	.byte 0x10,0x10,0x10,0x10,0x10,0x10,0x01,0x00,0x01,0x00 
	.byte 0x10,0x10,0x10,0x10,0x11,0x10,0x11,0x10,0x11,0x10 ;my skinny W	 
	.byte 0x10,0x10,0x10,0x10,0x01,0x00,0x10,0x10,0x10,0x10
	.byte 0x10,0x10,0x10,0x10,0x11,0x10,0x01,0x00,0x01,0x00
	.byte 0x11,0x10,0x00,0x10,0x01,0x00,0x10,0x00,0x11,0x10	;Z

	.byte 0x11,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x11,0x00	;[
	.byte 0x10,0x00,0x10,0x00,0x01,0x00,0x00,0x10,0x00,0x10	;\
	.byte 0x01,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x01,0x10	;]
	.byte 0x01,0x00,0x10,0x10,0x00,0x00,0x00,0x00,0x00,0x00	;^
	.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x11,0x10	;_
	
badfont:
	.byte 0x11,0x10,0x00,0x00,0x11,0x10,0x00,0x00,0x11,0x10	;lines
	
blitdata:
	.byte 00,01,02,03,04,05,06,07,08,09,10,11,12,13,14,15
	.byte 16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
	.byte 32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47
	.byte 48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
	.byte 64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79
	.byte 80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95
	.byte 96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111
	.byte 112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127
	.byte 128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143
	.byte 144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159
	.byte 160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175
	.byte 176,177,178,179,180,181,182,183,184,185,186,187,188,189,190,191
	.byte 192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207
	.byte 208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223
	.byte 224,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239
	.byte 240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255
	
	
	.area	_CODEE800				;this area will link at E800
	
;  MC6809 CPU Emulation Validation
;
; Tested on an SGS Thomson EF6809P Processor
;
; W. Schwotzer                     20.07.2003
;

	EOT =   0x00		;end of text

test6809:
	ldb		#0x00
	stb		failed_6809

; Test Addressing modes
	ldb		#watchdog_data
	stb		watchdog
       JSR  TAD1
	ldb		#watchdog_data
	stb		watchdog
       JSR  TAD2
	ldb		#watchdog_data
	stb		watchdog
       JSR  TAD3
	ldb		#watchdog_data
	stb		watchdog
       JSR  TAD4
	ldb		#watchdog_data
	stb		watchdog
       JSR  TAD5
	ldb		#watchdog_data
	stb		watchdog
       JSR  TAD6
	ldb		#watchdog_data
	stb		watchdog
       JSR  TAD7
	ldb		#watchdog_data
	stb		watchdog
       JSR  TAD8
	ldb		#watchdog_data
	stb		watchdog
       JSR  TAD9
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADA
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADB
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADI1
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADI3
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADI5
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADI6
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADI7
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADI8
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADI9
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADIA
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADIB
	ldb		#watchdog_data
	stb		watchdog
       JSR  TADIC

; Test Instructions
	ldb		#watchdog_data
	stb		watchdog
       JSR   TNEG
	ldb		#watchdog_data
	stb		watchdog
       JSR   TCOM
	ldb		#watchdog_data
	stb		watchdog
       JSR   TDEC
	ldb		#watchdog_data
	stb		watchdog
       JSR   TINC
	ldb		#watchdog_data
	stb		watchdog
       JSR   TCLR
	ldb		#watchdog_data
	stb		watchdog
       JSR   TADD
	ldb		#watchdog_data
	stb		watchdog
       JSR   TADDD
	ldb		#watchdog_data
	stb		watchdog
       JSR   TADC
	ldb		#watchdog_data
	stb		watchdog
       JSR   TMUL
	ldb		#watchdog_data
	stb		watchdog
       JSR   TSEX
	ldb		#watchdog_data
	stb		watchdog
       JSR   TSUB
	ldb		#watchdog_data
	stb		watchdog
       JSR   TSUBD
	ldb		#watchdog_data
	stb		watchdog
       JSR   TSBC
	ldb		#watchdog_data
	stb		watchdog
       JSR   TDAA
	ldb		#watchdog_data
	stb		watchdog
       JSR   TCMP
	ldb		#watchdog_data
	stb		watchdog
       JSR   TCMPD
	ldb		#watchdog_data
	stb		watchdog
       JSR   TTST
	ldb		#watchdog_data
	stb		watchdog
       JSR   TBIT
	ldb		#watchdog_data
	stb		watchdog
       JSR   TLSR
	ldb		#watchdog_data
	stb		watchdog
       JSR   TLSL
	ldb		#watchdog_data
	stb		watchdog
       JSR   TASR
	ldb		#watchdog_data
	stb		watchdog
       JSR   TROL
	ldb		#watchdog_data
	stb		watchdog
       JSR   TROR
	ldb		#watchdog_data
	stb		watchdog
       JSR   TLD
	ldb		#watchdog_data
	stb		watchdog
       JSR   TST
	ldb		#watchdog_data
	stb		watchdog
       JSR   TLDD
	ldb		#watchdog_data
	stb		watchdog
       JSR   TSTD
	ldb		#watchdog_data
	stb		watchdog
       JSR   TLEA
	ldb		#watchdog_data
	stb		watchdog
       JSR   TTFR
	ldb		#watchdog_data
	stb		watchdog
       JSR   TEXG
	ldb		#watchdog_data
	stb		watchdog
       
       rts
;end of 6809 test suite


;**************************************************
; Test MUL
;**************************************************
TMUL:   LDU   #LMUL
       LDX   #TBMUL
TMUL1:  LDD   ,X++
       MUL
       TFR   CC,DP
       CMPD  ,X++
       LBNE  OUTERR
       TFR   DP,B
       ANDB  #0x05   ; Only check Bits ZC
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LMUL
       LBNE  TMUL1
       RTS

TBMUL:  .FDB   0x0000,0x0000
       .FCB   0x04
       .FDB   0x8080,0x4000
       .FCB   0x00
       .FDB   0x01FF,0x00FF
       .FCB   0x01
       .FDB   0xFF01,0x00FF
       .FCB   0x01
       .FDB   0x7F81,0x3FFF
       .FCB   0x01
       .FDB   0x817F,0x3FFF
       .FCB   0x01
       .FDB   0xC040,0x3000
       .FCB   0x00
       .FDB   0x40C0,0x3000
       .FCB   0x00
       .FDB   0xFFFF,0xFE01
       .FCB   0x00
       .FDB   0x7F7F,0x3F01
       .FCB   0x00
       .FDB   0x0101,0x0001
       .FCB   0x00
LMUL:   .FCC   'MUL'
		.FCB	EOT

;**************************************************
; Test SEX
;**************************************************
TSEX:   LDU   #LSEX
       LDX   #TBSEX
TSEX1:  LDB   ,X+
       SEX
       TFR   CC,DP
       CMPD  ,X++
       LBNE  OUTERR
       TFR   DP,B
       ANDB  #0x0C   ; Only check Bits NZ
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LSEX
       LBNE  TSEX1
       RTS


TBSEX:  .FCB   0x00
       .FDB   0x0000
       .FCB   0x04
       .FCB   0x01
       .FDB   0x0001
       .FCB   0x00
       .FCB   0x7F
       .FDB   0x007F
       .FCB   0x00
       .FCB   0x80
       .FDB   0xFF80
       .FCB   0x08
       .FCB   0xFF
       .FDB   0xFFFF
       .FCB   0x08
LSEX:  .FCC   'SEX'
		.FCB	EOT


;**************************************************
; Test TST
;**************************************************
TTST:   LDU   #LTST
       LDX   #TBTST
TTST1:  LDA   ,X+
       TSTA
       TFR   CC,B
       ANDB  #0x0E   ; Only check Bits NZV
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LTST
       LBNE  TTST1
       RTS

TBTST:  .FCB   0x00,0x04
       .FCB   0x80,0x08
       .FCB   0x01,0x00
       .FCB   0xFF,0x08
       .FCB   0x7F,0x00
       .FCB   0x81,0x08
       .FCB   0xC0,0x08
       .FCB   0x40,0x00
LTST:   .FCC   'TST'
		.FCB	EOT


;**************************************************
; Test LD
;**************************************************
TLD:    LDU   #LLD
       LDX   #TBTST
TLD1:   LDA   ,X+
       TFR   CC,B
       ANDB  #0x0E   ; Only check Bits NZV
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LTST
       LBNE  TLD1
       RTS
LLD:    .FCC   'LD'
		.FCB	EOT


;**************************************************
; Test ST
;**************************************************
TST:    LDU   #LST
       LDX   #TBTST
TST1:   LDA   ,X+
       STA   EXTREG
       TFR   CC,B
       ANDB  #0x0E   ; Only check Bits NZV
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LTST
       LBNE  TST1
       RTS
LST:    .FCC   'ST'
		.FCB	EOT


;**************************************************
; Test LDD
;**************************************************
TLDD:   LDU   #LLDD
       LDX   #TBLDD
TLDD1:  LDD   ,X++
       TFR   CC,B
       ANDB  #0x0E   ; Only check Bits NZV
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LLDD
       LBNE  TLDD1
       RTS
TBLDD:  .FDB   0x0000
       .FCB   0x04
       .FDB   0x8000
       .FCB   0x08
       .FDB   0x0001
       .FCB   0x00
       .FDB   0xFFFF
       .FCB   0x08
       .FDB   0x7FFF
       .FCB   0x00
       .FDB   0x8001
       .FCB   0x08
       .FDB   0xC000
       .FCB   0x08
       .FDB   0x4000
       .FCB   0x00
LLDD:   .FCC   'LDD'
		.FCB	EOT


;**************************************************
; Test STD
;**************************************************
TSTD:   LDU   #LSTD
       LDX   #TBLDD
TSTD1:  LDD   ,X++
       STD   EXTREG
       TFR   CC,B
       ANDB  #0x0E   ; Only check Bits NZV
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LLDD
       LBNE  TSTD1
       RTS
LSTD:   .FCC   'STD'
		.FCB	EOT


;**************************************************
; Test LEA
;**************************************************
TLEA:   LDU   #LLEA
       LDX   #TBLEA
TLEA1:  LDY   ,X++
       LEAY  ,Y
       TFR   CC,B
       ANDB  #0x04   ; Only check Bit Z
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LLEA
       LBNE  TLEA1
       RTS

TBLEA:  .FDB   0x0000
       .FCB   0x04
       .FDB   0x0001
       .FCB   0x00
       .FDB   0xFFFF
       .FCB   0x00
       .FDB   0x7FFF
       .FCB   0x00
       .FDB   0x8000
       .FCB   0x00
       .FDB   0x8001
       .FCB   0x00
LLEA:   .FCC   'LEA'
		.FCB	EOT


;**************************************************
; Test BIT
;**************************************************
TBIT:   LDU   #LBIT
       LDX   #TBBIT
TBIT1:  LDA   ,X+
       BITA  ,X+
       TFR   CC,B
       ANDB  #0x0E   ; Only check Bits NZV
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LBIT
       LBNE  TBIT1
       RTS

TBBIT:  .FCB   0x00,0x00,0x04
       .FCB   0xAA,0x55,0x04
       .FCB   0xAA,0xAA,0x08
       .FCB   0x55,0x55,0x00
       .FCB   0xFF,0xFF,0x08
       .FCB   0xFF,0x80,0x08
       .FCB   0x81,0x80,0x08
       .FCB   0xFF,0x7F,0x00
       .FCB   0xFF,0x01,0x00
       .FCB   0xF0,0x0F,0x04
LBIT:   .FCC   'BIT'
		.FCB	EOT



;**************************************************
; Test DAA
;**************************************************
TDAA:  LDU   #LDAA
       LDX   #TBDAA
TDAA1:  LDA   ,X+
       TFR   CC,B
       ANDB  ,X+
       ORB   ,X+
       TFR   B,CC
       DAA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0D   ; Only check Bits NZC
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LDAA
       LBNE  TDAA1
       RTS

TBDAA:
; Carry: 0, Halfcarry: 0
       .byte   0x00,0xDE,0x00,0x00,0x04
       .byte   0x01,0xDE,0x00,0x01,0x00
       .byte   0x09,0xDE,0x00,0x09,0x00
       .byte   0x0A,0xDE,0x00,0x10,0x00
       .byte   0x0F,0xDE,0x00,0x15,0x00
       .byte   0x10,0xDE,0x00,0x10,0x00
       .byte   0x4A,0xDE,0x00,0x50,0x00
       .byte   0x79,0xDE,0x00,0x79,0x00
       .byte   0x7A,0xDE,0x00,0x80,0x08
       .byte   0x7F,0xDE,0x00,0x85,0x08
       .byte   0x81,0xDE,0x00,0x81,0x08
       .byte   0x99,0xDE,0x00,0x99,0x08
       .byte   0xA0,0xDE,0x00,0x00,0x05
       .byte   0xBF,0xDE,0x00,0x25,0x01
       .byte   0xF0,0xDE,0x00,0x50,0x01
       .byte   0xFF,0xDE,0x00,0x65,0x01
; Carry: 1, Halfcarry: 0
       .byte   0x00,0xDF,0x01,0x60,0x01
       .byte   0x01,0xDF,0x01,0x61,0x01
       .byte   0x09,0xDF,0x01,0x69,0x01
       .byte   0x0A,0xDF,0x01,0x70,0x01
       .byte   0x0F,0xDF,0x01,0x75,0x01
       .byte   0x10,0xDF,0x01,0x70,0x01
       .byte   0x4A,0xDF,0x01,0xB0,0x09
       .byte   0x79,0xDF,0x01,0xD9,0x09
       .byte   0x7A,0xDF,0x01,0xE0,0x09
       .byte   0x7F,0xDF,0x01,0xe5,0x09
       .byte   0x81,0xDF,0x01,0xE1,0x09
       .byte   0x99,0xDF,0x01,0xF9,0x09
       .byte   0xA0,0xDF,0x01,0x00,0x05
       .byte   0xBF,0xDF,0x01,0x25,0x01
       .byte   0xF0,0xDF,0x01,0x50,0x01
       .byte   0xFF,0xDF,0x01,0x65,0x01
; Carry: 0, Halfcarry: 1
       .byte   0x00,0xFE,0x20,0x06,0x00
       .byte   0x01,0xFE,0x20,0x07,0x00
       .byte   0x09,0xFE,0x20,0x0F,0x00
       .byte   0x0A,0xFE,0x20,0x10,0x00
       .byte   0x0F,0xFE,0x20,0x15,0x00
       .byte   0x10,0xFE,0x20,0x16,0x00
       .byte   0x4A,0xFE,0x20,0x50,0x00
       .byte   0x79,0xFE,0x20,0x7F,0x00
       .byte   0x7A,0xFE,0x20,0x80,0x08
       .byte   0x7F,0xFE,0x20,0x85,0x08
       .byte   0x81,0xFE,0x20,0x87,0x08
       .byte   0x99,0xFE,0x20,0x9F,0x08
       .byte   0xA0,0xFE,0x20,0x06,0x01
       .byte   0xBF,0xFE,0x20,0x25,0x01
       .byte   0xF0,0xFE,0x20,0x56,0x01
       .byte   0xFF,0xFE,0x20,0x65,0x01
; Carry: 1, Halfcarry: 1
       .byte   0x00,0xFF,0x21,0x66,0x01
       .byte   0x01,0xFF,0x21,0x67,0x01
       .byte   0x09,0xFF,0x21,0x6F,0x01
       .byte   0x0A,0xFF,0x21,0x70,0x01
       .byte   0x0F,0xFF,0x21,0x75,0x01
       .byte   0x10,0xFF,0x21,0x76,0x01
       .byte   0x4A,0xFF,0x21,0xB0,0x09
       .byte   0x79,0xFF,0x21,0xDF,0x09
       .byte   0x7A,0xFF,0x21,0xE0,0x09
       .byte   0x7F,0xFF,0x21,0xE5,0x09
       .byte   0x81,0xFF,0x21,0xE7,0x09
       .byte   0x99,0xFF,0x21,0xFF,0x09
       .byte   0xA0,0xFF,0x21,0x06,0x01
       .byte   0xBF,0xFF,0x21,0x25,0x01
       .byte   0xF0,0xFF,0x21,0x56,0x01
       .byte   0xFF,0xFF,0x21,0x65,0x01
LDAA:  .FCC   'DAA'
		.byte  EOT

;*************************************************
; Test NEG
;*************************************************
TNEG:   LDU   #LNEG
       LDX   #TBNEG
TNEG1:  LDA   ,X+
       NEGA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0F   ; Only check Bits NZVC
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LNEG
       LBNE  TNEG1
       RTS

TBNEG:  .FCB   0x00,0x00,0x04
       .FCB   0x80,0x80,0x0B
       .FCB   0x01,0xFF,0x09
       .FCB   0xFF,0x01,0x01
       .FCB   0x7F,0x81,0x09
       .FCB   0x81,0x7F,0x01
       .FCB   0xC0,0x40,0x01
       .FCB   0x40,0xC0,0x09
LNEG:   .FCC   'NEG'
       .FCB   EOT

;**************************************************
; Test COM
;**************************************************
TCOM:   LDU   #LCOM
       LDX   #TBCOM
TCOM1:  LDA   ,X+
       COMA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0F   ; Only check Bits NZVC
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LCOM
       BNE   TCOM1
       RTS


TBCOM:  .FCB   0x00,0xFF,0x09
       .FCB   0xFF,0x00,0x05
       .FCB   0xF0,0x0F,0x01
       .FCB   0x0F,0xF0,0x09
       .FCB   0x55,0xAA,0x09
       .FCB   0xAA,0x55,0x01
       .FCB   0x01,0xFE,0x09
       .FCB   0xFE,0x01,0x01
       .FCB   0x80,0x7F,0x01
       .FCB   0x7F,0x80,0x09
LCOM:   .FCC   'COM'
       .FCB   EOT

;**************************************************
; Test LSR
;**************************************************
TLSR:   LDU   #LLSR
       LDX   #TBLSR
TLSR1:  LDA   ,X+
       LSRA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0F   ; Only check Bits NZVC
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LLSR
       BNE   TLSR1
       RTS


TBLSR:  .FCB   0x00,0x00,0x04
       .FCB   0xFF,0x7F,0x01
       .FCB   0x7F,0x3F,0x01
       .FCB   0x3F,0x1F,0x01
       .FCB   0x1F,0x0F,0x01
       .FCB   0x0F,0x07,0x01
       .FCB   0x07,0x03,0x01
       .FCB   0x03,0x01,0x01
       .FCB   0x01,0x00,0x05
       .FCB   0x55,0x2A,0x01
       .FCB   0xAA,0x55,0x00
       .FCB   0x80,0x40,0x00
       .FCB   0x10,0x08,0x00
       .FCB   0xC0,0x60,0x00
       .FCB   0xE0,0x70,0x00
       .FCB   0xF0,0x78,0x00
       .FCB   0xF8,0x7C,0x00
       .FCB   0xFC,0x7E,0x00
       .FCB   0xFE,0x7F,0x00
LLSR:   .FCC   'LSR'
       .FCB   EOT

;**************************************************
; Test LSL
;**************************************************
TLSL:   LDU   #LLSL
       LDX   #TBLSL
TLSL1:  LDA   ,X+
       LSLA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0F   ; Only check Bits NZVC
       CMPB  ,X+
;       LBNE  OUTERR		;!!! was commented in orig code
       CMPX  #LLSL
       BNE   TLSL1
       RTS


TBLSL:  .FCB   0x00,0x00,0x04
       .FCB   0xFF,0xFE,0x01
       .FCB   0x7F,0xFE,0x01
       .FCB   0x3F,0x7E,0x01
       .FCB   0x1F,0x3E,0x00
       .FCB   0x0F,0x1E,0x00
       .FCB   0x07,0x0E,0x00
       .FCB   0x03,0x06,0x00
       .FCB   0x01,0x02,0x00
       .FCB   0x55,0xAA,0x00
       .FCB   0xAA,0x54,0x00
       .FCB   0x80,0x00,0x01
       .FCB   0x10,0x20,0x01
       .FCB   0xC0,0x80,0x01
       .FCB   0xE0,0xC0,0x01
       .FCB   0xF0,0xE0,0x01
       .FCB   0xF8,0xF0,0x01
       .FCB   0xFC,0xF8,0x01
       .FCB   0xFE,0xFC,0x01
LLSL:   .FCC   'LSL'
       .FCB   EOT

;**************************************************
; Test ASR
;**************************************************
TASR:   LDU   #LASR
       LDX   #TBASR
TASR1:  LDA   ,X+
       ASRA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0D   ; Only check Bits NZC
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LASR
       BNE   TASR1
       RTS


TBASR:  .FCB   0x00,0x00,0x04
       .FCB   0xFF,0xFF,0x09
       .FCB   0x7F,0x3F,0x01
       .FCB   0x3F,0x1F,0x01
       .FCB   0x1F,0x0F,0x01
       .FCB   0x0F,0x07,0x01
       .FCB   0x07,0x03,0x01
       .FCB   0x03,0x01,0x01
       .FCB   0x01,0x00,0x05
       .FCB   0x55,0x2A,0x01
       .FCB   0xAA,0xD5,0x08
       .FCB   0x80,0xC0,0x08
       .FCB   0x10,0x08,0x00
       .FCB   0xC0,0xE0,0x08
       .FCB   0xE0,0xF0,0x08
       .FCB   0xF0,0xF8,0x08
       .FCB   0xF8,0xFC,0x08
       .FCB   0xFC,0xFE,0x08
       .FCB   0xFE,0xFF,0x08
LASR:   .FCC   'ASR'
       .FCB   EOT

;**************************************************
; Test ROR
;**************************************************
TROR:   LDU   #LROR
       LDX   #TBROR
TROR1:  LDA   ,X+
       TFR   CC,B
       ANDB  ,X+
       ORB   ,X+
       TFR   B,CC
       RORA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0D   ; Only check Bits NZC
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LROR
       BNE   TROR1
       RTS

TBROR:  .FCB   0x00,0xFE,0x00,0x00,0x04
       .FCB   0x01,0xFE,0x00,0x00,0x05
       .FCB   0x0F,0xFE,0x00,0x07,0x01
       .FCB   0x10,0xFE,0x00,0x08,0x00
       .FCB   0x7F,0xFE,0x00,0x3F,0x01
       .FCB   0x80,0xFE,0x00,0x40,0x00
       .FCB   0xFE,0xFE,0x00,0x7F,0x00
       .FCB   0xFF,0xFE,0x00,0x7F,0x01
       .FCB   0x00,0xFF,0x01,0x80,0x08
       .FCB   0x01,0xFF,0x01,0x80,0x09
       .FCB   0x0F,0xFF,0x01,0x87,0x09
       .FCB   0x10,0xFF,0x01,0x88,0x08
       .FCB   0x7F,0xFF,0x01,0xBF,0x09
       .FCB   0x80,0xFF,0x01,0xC0,0x08
       .FCB   0xFE,0xFF,0x01,0xFF,0x08
       .FCB   0xFF,0xFF,0x01,0xFF,0x09
LROR:   .FCC   'ROR'
       .FCB   EOT

;**************************************************
; Test ROL
;**************************************************
TROL:   LDU   #LROL
       LDX   #TBROL
TROL1:  LDA   ,X+
       TFR   CC,B
       ANDB  ,X+
       ORB   ,X+
       TFR   B,CC
       ROLA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0D   ; Only check Bits NZC
       CMPB  ,X+
;       LBNE  OUTERR		;!!! was commented in orig code
       CMPX  #LROL
       BNE   TROL1
       RTS

TBROL:  .FCB   0x00,0xFE,0x00,0x00,0x04
       .FCB   0x01,0xFE,0x00,0x02,0x00
       .FCB   0x0F,0xFE,0x00,0x1E,0x00
       .FCB   0x08,0xFE,0x00,0x10,0x00
       .FCB   0x7F,0xFE,0x00,0xFE,0x08
       .FCB   0x80,0xFE,0x00,0x00,0x05
       .FCB   0xFE,0xFE,0x00,0xFC,0x09
       .FCB   0xFF,0xFE,0x00,0xFE,0x09
       .FCB   0x00,0xFF,0x01,0x01,0x00
       .FCB   0x01,0xFF,0x01,0x03,0x00
       .FCB   0x0F,0xFF,0x01,0x1F,0x00
       .FCB   0x08,0xFF,0x01,0x11,0x00
       .FCB   0x7F,0xFF,0x01,0xFF,0x08
       .FCB   0x80,0xFF,0x01,0x01,0x01
       .FCB   0xFE,0xFF,0x01,0xFD,0x09
       .FCB   0xFF,0xFF,0x01,0xFF,0x09
LROL:   .FCC   'ROL'
       .FCB   EOT

;**************************************************
; Test DEC
;**************************************************
TDEC:   LDU   #LDEC
       LDX   #TBDEC
TDEC1:  LDA   ,X+
       DECA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0E   ; Only check Bits NZV
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LDEC
       BNE   TDEC1
       RTS

TBDEC:  .FCB   0x01,0x00,0x04
       .FCB   0x00,0xFF,0x08
       .FCB   0xFF,0xFE,0x08
       .FCB   0x80,0x7F,0x02
       .FCB   0x7F,0x7E,0x00
       .FCB   0x10,0x0F,0x00
       .FCB   0x0F,0x0E,0x00
LDEC:   .FCC   'DEC'
       .FCB   EOT

;**************************************************
; Test INC
;**************************************************
TINC:   LDU   #LINC
       LDX   #TBINC
TINC1:  LDA   ,X+
       INCA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0E   ; Only check Bits NZV
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LINC
       BNE   TINC1
       RTS

TBINC:  .FCB   0x00,0x01,0x00
       .FCB   0xFE,0xFF,0x08
       .FCB   0xFF,0x00,0x04
       .FCB   0x7F,0x80,0x0A
       .FCB   0x80,0x81,0x08
       .FCB   0x0F,0x10,0x00
       .FCB   0x10,0x11,0x00
LINC:   .FCC   'INC'
       .FCB   EOT


;**************************************************
; Test CLR
;**************************************************
TCLR:   LDU   #LCLR
       LDX   #TBCLR
TCLR1:  LDA   ,X+
       CLRA
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0F   ; Only check Bits NZVC
       CMPB  ,X+
;       LBNE  OUTERR		;!!! was commented in orig code
       CMPX  #LCLR
       BNE   TCLR1
       RTS

TBCLR:  .FCB   0x01,0x00,0x04
       .FCB   0x00,0x00,0x04
       .FCB   0xFF,0x00,0x04
       .FCB   0x80,0x00,0x04
       .FCB   0x7F,0x00,0x04
       .FCB   0x10,0x00,0x04
       .FCB   0x0F,0x00,0x04
LCLR:   .FCC   'CLR'
       .FCB   EOT


;**************************************************
; Test ADDD
;**************************************************
TADDD:  LDU   #LADDD
       LDX   #TBADDD
TADDD1: LDD   ,X++
       ADDD  ,X++
       TFR   CC,DP
       CMPD  ,X++
       LBNE  OUTERR
       TFR   DP,A
       ANDA  #0x0F   ; Only check Bits NZVC
       CMPA  ,X+
       LBNE  OUTERR
       CMPX  #LADDD
       BNE   TADDD1
       RTS

TBADDD: .FDB   0x0000,0x0000,0x0000
       .FCB   0x04
       .FDB   0x0000,0x0001,0x0001
       .FCB   0x00
       .FDB   0x4000,0x4000,0x8000
       .FCB   0x0A
       .FDB   0x0000,0x8000,0x8000
       .FCB   0x08
       .FDB   0x8000,0x8000,0x0000
       .FCB   0x07
       .FDB   0x4000,0x8000,0xC000
       .FCB   0x08
       .FDB   0x7FFF,0x7FFF,0xFFFE
       .FCB   0x0A
       .FDB   0x7FFF,0x8000,0xFFFF
       .FCB   0x08
       .FDB   0x7FFF,0x0001,0x8000
       .FCB   0x0A
       .FDB   0x8000,0x0001,0x8001
       .FCB   0x08
       .FDB   0x4000,0xC000,0x0000
       .FCB   0x05
       .FDB   0x4000,0xC001,0x0001
       .FCB   0x01
       .FDB   0xFFFF,0xFFFF,0xFFFE
       .FCB   0x09
       .FDB   0x8001,0x8000,0x0001
       .FCB   0x03
LADDD:  .FCC   'ADDD'
       .FCB   EOT


;**************************************************
; Test ADD
;**************************************************
TADD:   LDU   #LADD
       LDX   #TBADD
TADD1:  LDB   ,X+
       ADDB  ,X+
       TFR   CC,A
       CMPB  ,X+
       LBNE  OUTERR
       ANDA  #0x2F   ; Only check Bits HNZVC
       CMPA  ,X+
       LBNE  OUTERR
       CMPX  #LADD
       BNE   TADD1
       RTS

TBADD:  .FCB   0x00,0x00,0x00,0x04
       .FCB   0x00,0x01,0x01,0x00
       .FCB   0x40,0x40,0x80,0x0A
       .FCB   0x00,0x80,0x80,0x08
       .FCB   0x80,0x80,0x00,0x07
       .FCB   0x40,0x80,0xC0,0x08
       .FCB   0x7F,0x7F,0xFE,0x2A
       .FCB   0x7F,0x80,0xFF,0x08
       .FCB   0x80,0x7F,0xFF,0x08
       .FCB   0x7F,0x01,0x80,0x2A
       .FCB   0x80,0x01,0x81,0x08
       .FCB   0x40,0xC0,0x00,0x05
       .FCB   0x40,0xC1,0x01,0x01
       .FCB   0xFF,0xFF,0xFE,0x29
       .FCB   0x81,0x80,0x01,0x03
LADD:   .FCC   'ADD'
       .FCB   EOT


;**************************************************
; Test ADC
;**************************************************
TADC:   LDU   #LADC
       LDX   #TBADC
TADC1:  LDA   ,X+
       TFR   CC,B
       ANDB  ,X+
       ORB   ,X+
       TFR   B,CC
       ADCA  ,X+
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x2F   ; Only check Bits HNZVC
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LADC
       BNE   TADC1
       RTS

TBADC:  .FCB   0x00,0xFE,0x00,0x00,0x00,0x04
       .FCB   0x00,0xFE,0x00,0x01,0x01,0x00
       .FCB   0x40,0xFE,0x00,0x40,0x80,0x0A
       .FCB   0x00,0xFE,0x00,0x80,0x80,0x08
       .FCB   0x80,0xFE,0x00,0x80,0x00,0x07
       .FCB   0x40,0xFE,0x00,0x80,0xC0,0x08
       .FCB   0x7F,0xFE,0x00,0x7F,0xFE,0x2A
       .FCB   0x7F,0xFE,0x00,0x80,0xFF,0x08
       .FCB   0x80,0xFE,0x00,0x7F,0xFF,0x08
       .FCB   0x7F,0xFE,0x00,0x01,0x80,0x2A
       .FCB   0x80,0xFE,0x00,0x01,0x81,0x08
       .FCB   0x40,0xFE,0x00,0xC0,0x00,0x05
       .FCB   0x40,0xFE,0x00,0xC1,0x01,0x01
       .FCB   0xFF,0xFE,0x00,0xFF,0xFE,0x29
       .FCB   0x81,0xFE,0x00,0x80,0x01,0x03
       .FCB   0x00,0xFF,0x01,0x00,0x01,0x00
       .FCB   0x00,0xFF,0x01,0x01,0x02,0x00
       .FCB   0x40,0xFF,0x01,0x40,0x81,0x0A
       .FCB   0x00,0xFF,0x01,0x80,0x81,0x08
       .FCB   0x80,0xFF,0x01,0x80,0x01,0x03
       .FCB   0x40,0xFF,0x01,0x80,0xC1,0x08
       .FCB   0x7F,0xFF,0x01,0x7F,0xFF,0x2A
       .FCB   0x7F,0xFF,0x01,0x80,0x00,0x25
       .FCB   0x80,0xFF,0x01,0x7F,0x00,0x25
       .FCB   0x7F,0xFF,0x01,0x01,0x81,0x2A
       .FCB   0x80,0xFF,0x01,0x01,0x82,0x08
       .FCB   0x40,0xFF,0x01,0xC0,0x01,0x01
       .FCB   0x40,0xFF,0x01,0xC1,0x02,0x01
       .FCB   0xFF,0xFF,0x01,0xFF,0xFF,0x29
       .FCB   0x81,0xFF,0x01,0x80,0x02,0x03
LADC:   .FCC   'ADC'
       .FCB   EOT


;**************************************************
; Test CMP
;**************************************************
TCMP:   LDU   #LCMP
       LDX   #TBSUB
TCMP1:  LDB   ,X+
       CMPB  ,X+
       TFR   CC,A
       LEAX  1,X    ; Skip result Byte
       ANDA  #0x0F   ; Only check Bits NZVC
       CMPA  ,X+
       LBNE  OUTERR
       CMPX  #LSUB
       BNE   TCMP1
       RTS

LCMP:   .FCC   'CMP'
       .FCB   EOT

;**************************************************
; Test SUB
;**************************************************
TSUB:   LDU   #LSUB
       LDX   #TBSUB
TSUB1:  LDB   ,X+
       SUBB  ,X+
       TFR   CC,A
       CMPB  ,X+
       LBNE  OUTERR
       ANDA  #0x0F   ; Only check Bits NZVC
       CMPA  ,X+
       LBNE  OUTERR
       CMPX  #LSUB
       BNE   TSUB1
       RTS

TBSUB:  .FCB   0x00,0x00,0x00,0x04
       .FCB   0x00,0x01,0xFF,0x09
       .FCB   0x00,0x7F,0x81,0x09
       .FCB   0x00,0x80,0x80,0x0B
       .FCB   0x00,0xFF,0x01,0x01
       .FCB   0x01,0x00,0x01,0x00
       .FCB   0x01,0x7F,0x82,0x09
       .FCB   0x40,0x41,0xFF,0x09
       .FCB   0x40,0x80,0xC0,0x0B
       .FCB   0x40,0xC0,0x80,0x0B
       .FCB   0x40,0xC1,0x7F,0x01
       .FCB   0x7F,0x00,0x7F,0x00
       .FCB   0x7F,0x01,0x7E,0x00
       .FCB   0x7F,0x7E,0x01,0x00
       .FCB   0x7F,0x7F,0x00,0x04
       .FCB   0x7F,0x80,0xFF,0x0B
       .FCB   0x7F,0xFF,0x80,0x0B
       .FCB   0x80,0x01,0x7F,0x02
       .FCB   0x80,0x40,0x40,0x02
       .FCB   0x80,0x7F,0x01,0x02
       .FCB   0x80,0x80,0x00,0x04
       .FCB   0x80,0x81,0xFF,0x09
       .FCB   0x81,0x80,0x01,0x00
       .FCB   0xFF,0xFF,0x00,0x04
       .FCB   0xFF,0xFE,0x01,0x00
       .FCB   0xFF,0x00,0xFF,0x08
LSUB:   .FCC   'SUB'
       .FCB   EOT


;**************************************************
; Test SBC
;**************************************************
TSBC:   LDU   #LSBC
       LDX   #TBSBC
TSBC1:  LDA   ,X+
       TFR   CC,B
       ANDB  ,X+
       ORB   ,X+
       TFR   B,CC
       SBCA  ,X+
       TFR   CC,B
       CMPA  ,X+
       LBNE  OUTERR
       ANDB  #0x0F   ; Only check Bits NZVC
       CMPB  ,X+
       LBNE  OUTERR
       CMPX  #LSBC
       BNE   TSBC1
       RTS

TBSBC:  .FCB   0x00,0xFE,0x00,0x00,0x00,0x04
       .FCB   0x00,0xFE,0x00,0x01,0xFF,0x09
       .FCB   0x00,0xFE,0x00,0x7F,0x81,0x09
       .FCB   0x00,0xFE,0x00,0x80,0x80,0x0B
       .FCB   0x00,0xFE,0x00,0xFF,0x01,0x01
       .FCB   0x01,0xFE,0x00,0x00,0x01,0x00
       .FCB   0x01,0xFE,0x00,0x7F,0x82,0x09
       .FCB   0x40,0xFE,0x00,0x41,0xFF,0x09
       .FCB   0x40,0xFE,0x00,0x80,0xC0,0x0B
       .FCB   0x40,0xFE,0x00,0xC0,0x80,0x0B
       .FCB   0x40,0xFE,0x00,0xC1,0x7F,0x01
       .FCB   0x7F,0xFE,0x00,0x00,0x7F,0x00
       .FCB   0x7F,0xFE,0x00,0x01,0x7E,0x00
       .FCB   0x7F,0xFE,0x00,0x7E,0x01,0x00
       .FCB   0x7F,0xFE,0x00,0x7F,0x00,0x04
       .FCB   0x7F,0xFE,0x00,0x80,0xFF,0x0B
       .FCB   0x7F,0xFE,0x00,0xFF,0x80,0x0B
       .FCB   0x80,0xFE,0x00,0x01,0x7F,0x02
       .FCB   0x80,0xFE,0x00,0x40,0x40,0x02
       .FCB   0x80,0xFE,0x00,0x7F,0x01,0x02
       .FCB   0x80,0xFE,0x00,0x80,0x00,0x04
       .FCB   0x80,0xFE,0x00,0x81,0xFF,0x09
       .FCB   0x81,0xFE,0x00,0x80,0x01,0x00
       .FCB   0xFF,0xFE,0x00,0xFF,0x00,0x04
       .FCB   0xFF,0xFE,0x00,0xFE,0x01,0x00
       .FCB   0xFF,0xFE,0x00,0x00,0xFF,0x08
       .FCB   0x00,0xFF,0x01,0x00,0xFF,0x09
       .FCB   0x00,0xFF,0x01,0x01,0xFE,0x09
       .FCB   0x00,0xFF,0x01,0x7F,0x80,0x09
       .FCB   0x00,0xFF,0x01,0x80,0x7F,0x01
       .FCB   0x00,0xFF,0x01,0xFF,0x00,0x05
       .FCB   0x01,0xFF,0x01,0x00,0x00,0x04
       .FCB   0x01,0xFF,0x01,0x7F,0x81,0x09
       .FCB   0x40,0xFF,0x01,0x41,0xFE,0x09
       .FCB   0x40,0xFF,0x01,0x80,0xBF,0x0B
       .FCB   0x40,0xFF,0x01,0xC0,0x7F,0x01
       .FCB   0x40,0xFF,0x01,0xC1,0x7E,0x01
       .FCB   0x7F,0xFF,0x01,0x00,0x7E,0x00
       .FCB   0x7F,0xFF,0x01,0x01,0x7D,0x00
       .FCB   0x7F,0xFF,0x01,0x7E,0x00,0x04
       .FCB   0x7F,0xFF,0x01,0x7F,0xFF,0x09
       .FCB   0x7F,0xFF,0x01,0x80,0xFE,0x0B
       .FCB   0x7F,0xFF,0x01,0xFF,0x7F,0x01
       .FCB   0x80,0xFF,0x01,0x01,0x7E,0x02
       .FCB   0x80,0xFF,0x01,0x40,0x3F,0x02
       .FCB   0x80,0xFF,0x01,0x7F,0x00,0x06
       .FCB   0x80,0xFF,0x01,0x80,0xFF,0x09
       .FCB   0x80,0xFF,0x01,0x81,0xFE,0x09
       .FCB   0x81,0xFF,0x01,0x80,0x00,0x04
       .FCB   0xFF,0xFF,0x01,0xFF,0xFF,0x09
       .FCB   0xFF,0xFF,0x01,0xFE,0x00,0x04
       .FCB   0xFF,0xFF,0x01,0x00,0xFE,0x08
LSBC:   .FCC   'SBC'
       .FCB   EOT


;**************************************************
; Test SUBD
;**************************************************
TSUBD:  LDU   #LSUBD
       LDX   #TBSUBD
TSUBD1: LDD   ,X++
       SUBD  ,X++
       TFR   CC,DP
       CMPD  ,X++
       LBNE  OUTERR
       TFR   DP,A
       ANDA  #0x0F   ; Only check Bits NZVC
       CMPA  ,X+
       LBNE  OUTERR
       CMPX  #LSUBD
       BNE   TSUBD1
       RTS

TBSUBD: .FDB   0x0000,0x0000,0x0000
       .FCB   0x04
       .FDB   0x0000,0x0001,0xFFFF
       .FCB   0x09
       .FDB   0x0000,0x7FFF,0x8001
       .FCB   0x09
       .FDB   0x0000,0x8000,0x8000
       .FCB   0x0B
       .FDB   0x0000,0xFFFF,0x0001
       .FCB   0x01
       .FDB   0x0001,0x0000,0x0001
       .FCB   0x00
       .FDB   0x0001,0x7FFF,0x8002
       .FCB   0x09
       .FDB   0x4000,0x4001,0xFFFF
       .FCB   0x09
       .FDB   0x4000,0x8000,0xC000
       .FCB   0x0B
       .FDB   0x4000,0xC000,0x8000
       .FCB   0x0B
       .FDB   0x4000,0xC001,0x7FFF
       .FCB   0x01
       .FDB   0x7FFF,0x0000,0x7FFF
       .FCB   0x00
       .FDB   0x7FFF,0x0001,0x7FFE
       .FCB   0x00
       .FDB   0x7FFF,0x7FFE,0x0001
       .FCB   0x00
       .FDB   0x7FFF,0x7FFF,0x0000
       .FCB   0x04
       .FDB   0x7FFF,0x8000,0xFFFF
       .FCB   0x0B
       .FDB   0x7FFF,0xFFFF,0x8000
       .FCB   0x0B
       .FDB   0x8000,0x0001,0x7FFF
       .FCB   0x02
       .FDB   0x8000,0x4000,0x4000
       .FCB   0x02
       .FDB   0x8000,0x7FFF,0x0001
       .FCB   0x02
       .FDB   0x8000,0x8000,0x0000
       .FCB   0x04
       .FDB   0x8000,0x8001,0xFFFF
       .FCB   0x09
       .FDB   0x8001,0x8000,0x0001
       .FCB   0x00
       .FDB   0xFFFF,0xFFFF,0x0000
       .FCB   0x04
       .FDB   0xFFFF,0xFFFE,0x0001
       .FCB   0x00
       .FDB   0xFFFF,0x0000,0xFFFF
       .FCB   0x08
LSUBD:  .FCC   'SUBD'
       .FCB   EOT


;**************************************************
; Test CMPD
;**************************************************
TCMPD:  LDU   #LCMPD
       LDX   #TBSUBD
TCMPD1: LDD   ,X++
       SUBD  ,X++
       TFR   CC,DP
       LEAX  2,X    ; Skip result Word
       TFR   DP,A
       ANDA  #0x0F   ; Only check Bits NZVC
       CMPA  ,X+
       LBNE  OUTERR
       CMPX  #LSUBD
       BNE   TCMPD1
       RTS

LCMPD:  .FCC   'CMPD'
       .FCB   EOT


;**************************************************
; Test TFR
;**************************************************
TTFR:   LDX   #TBTFR
TTFR1:  PSHS  X
       LDY   ,X
       JSR   ,Y
       PULS  X
       BNE   FTFR
       LEAX  2,X
       CMPX  #LTFR
       BNE   TTFR1
       RTS
FTFR:   LDU   #LTFR
       LBRA  OUTERR

CLRREG: CLRA
       CLRB
       LDX   #0
       LDY   #0
       LDU   #0
       TFR   A,DP
       TFR   A,CC
       RTS
TBTFR1: BSR   CLRREG
       LDD   #0x5678
       TFR   D,X
       CMPX  #0x5678  
       RTS
TBTFR2: BSR   CLRREG
       LDX   #0x1234
       TFR   X,Y
       CMPY  #0x1234  
       RTS
TBTFR3: BSR   CLRREG
       LDY   #0x5500
       TFR   Y,U
       CMPU  #0x5500  
       RTS
TBTFR4: BSR   CLRREG
       LDU   #0xFEFF
       TFR   U,D
       CMPD  #0xFEFF  
       RTS
TBTFR5: BSR   CLRREG
       LDA   #0x55
       TFR   A,B
       CMPB  #0x55  
       RTS
TBTFR6: BSR   CLRREG
       LDB   #0xAA
       TFR   B,DP
       PSHS  DP
       PULS  A
       CMPA  #0xAA
       RTS
TBTFR7: BSR   CLRREG
       LDA   #0x03
       PSHS  A
       CLRA
       PULS  DP
       TFR   DP,CC
       PSHS  CC
       PULS  A
       CMPA  #0x03
       RTS
TBTFR8: BSR   CLRREG
       LDA   #0x01
       PSHS  A
       PULS  CC
       TFR   CC,A
       CMPA  #0x01
       RTS

TBTFR:  .FDB   TBTFR1
       .FDB   TBTFR2
       .FDB   TBTFR3
       .FDB   TBTFR4
       .FDB   TBTFR5
       .FDB   TBTFR6
       .FDB   TBTFR7
       .FDB   TBTFR8
LTFR:   .FCC   'TFR'
       .FCB   EOT


;**************************************************
; Test EXG
;**************************************************
TEXG:   LDX   #TBEXG
TEXG1:  PSHS  X
       LDY   ,X
       JSR   ,Y
       PULS  X
       BNE   FEXG
       LEAX  2,X
       CMPX  #LEXG
       BNE   TEXG1
       RTS
FEXG:   LDU   #LEXG
       LBRA  OUTERR

TBEXG1: LBSR  CLRREG
       LDD   #0x5678
       LDX   #0xA55A
       EXG   D,X
       CMPX  #0x5678
       BNE   TBEXGE
       CMPD  #0xA55A  
TBEXGE: RTS
TBEXG2: LBSR  CLRREG
       LDX   #0x1234
       LDY   #0x0815
       EXG   X,Y
       CMPY  #0x1234
       BNE   TBEXGE
       CMPX  #0x0815
       RTS
TBEXG3: LBSR  CLRREG
       LDY   #0x5500
       LDU   #0x4711
       EXG   Y,U
       CMPU  #0x5500 
       BNE   TBEXGE 
       CMPY  #0x4711  
       RTS
TBEXG4: LBSR  CLRREG
       LDU   #0xFEFF
       LDD   #0x9999
       EXG   U,D
       CMPD  #0xFEFF
       BNE   TBEXGE
       CMPU  #0x9999  
       RTS
TBEXG5: LBSR  CLRREG
       LDA   #0x55
       LDB   #0xAA
       EXG   A,B
       CMPB  #0x55  
       BNE   TBEXGE
       CMPA  #0xAA
       RTS
TBEXG6: LBSR  CLRREG
       LDB   #0xAA
       LDA   #0x44
       PSHS  A
       CLRA
       PULS  DP
       EXG   B,DP
       PSHS  DP
       PULS  A
       CMPA  #0xAA
       BNE   TBEXGE
       CMPB  #0x44
       RTS
TBEXG7: LBSR  CLRREG
       LDA   #0x03
       PSHS  A
       CLRA
       PULS  DP
       LDA   #0x30
       PSHS  A
       CLRA
       PULS  CC
       EXG   DP,CC
       PSHS  CC
       PULS  A
       PSHS  DP
       PULS  B
       CMPA  #0x03
       LBNE  TBEXGE
       CMPB  #0x30
       RTS
TBEXG8: LBSR  CLRREG
       LDA   #0x11
       LDB   #0x99
       PSHS  B
       CLRB
       PULS  CC
       EXG   CC,A
       PSHS  CC
       PULS  B
       CMPA  #0x99
       LBNE  TBEXGE
       CMPB  #0x11
       RTS

TBEXG:  .FDB   TBEXG1
       .FDB   TBEXG2
       .FDB   TBEXG3
       .FDB   TBEXG4
       .FDB   TBEXG5
       .FDB   TBEXG6
       .FDB   TBEXG7
       .FDB   TBEXG8
LEXG:   .FCC   'EXG'

;**************************************************
; Test Index Addressing modes
;**************************************************
CLRMEM: PSHS  X
       LDX   #EXTREG-128
       CLRA
CLRM1:  CLR   ,X+
       INCA
       BNE   CLRM1
       PULS  X,PC

TAD1:   LDU   #LAD1
       LDX   #EXTREG
; LDA ,X
       BSR   CLRMEM
       LDA   #0x55
       STA   EXTREG
       LDA   ,X
       CMPA  #0x55
       LBNE  OUTERR
; LDA 1,X
       BSR   CLRMEM
       LDA   #0x12
       STA   EXTREG+1
       LDA   1,X
       CMPA  #0x12
       LBNE  OUTERR
; LDA 127,X
       BSR   CLRMEM
       LDA   #0x44
       STA   EXTREG+127
       LDA   127,X
       CMPA  #0x44
       LBNE  OUTERR
; LDA -1,X
       BSR   CLRMEM
       LDA   #0x34
       STA   EXTREG-1
       LDA   -1,X
       CMPA  #0x34
       LBNE  OUTERR
; LDA -128,X
       BSR   CLRMEM
       LDA   #0xAA
       STA   EXTREG-128
       LDA   -128,X
       CMPA  #0xAA
       LBNE  OUTERR
       RTS

; LDA ,X+
TAD2:   LDX   #EXTREG
       LDU   #LAD2
       BSR   CLRMEM
       LDD   #0xA55A
       STD   EXTREG
       LDA   ,X+
       CMPA  #0xA5
       LBNE  OUTERR
       LDA   ,X+
       CMPA  #0x5A
       LBNE  OUTERR
       RTS

; LDD ,X++
TAD3:   LDX   #EXTREG
       LDU   #LAD3
       LBSR  CLRMEM
       LDD   #0xA55A
       STD   EXTREG
       LDD   #0x789A
       STD   EXTREG+2
       LDD   ,X++
       CMPD  #0xA55A
       LBNE  OUTERR
       LDD   ,X++
       CMPD  #0x789A
       LBNE  OUTERR
       RTS

; LDA ,-X
TAD4:   LDX   #EXTREG
       LDU   #LAD4
       LBSR  CLRMEM
       LDD   #0xA55A
       STD   EXTREG-2
       LDA   ,-X
       CMPA  #0x5A
       LBNE  OUTERR
       LDA   ,-X
       CMPA  #0xA5
       LBNE  OUTERR
       RTS

; LDD ,--X
TAD5:   LDX   #EXTREG
       LDU   #LAD5
       LBSR  CLRMEM
       LDD   #0xA55A
       STD   EXTREG-2
       LDD   #0x789A
       STD   EXTREG-4
       LDD   ,--X
       CMPD  #0xA55A
       LBNE  OUTERR
       LDD   ,--X
       CMPD  #0x789A
       LBNE  OUTERR
       RTS

; LDA A,X
TAD6:   LDU   #LAD6
       LDX   #EXTREG
       LBSR  CLRMEM
       LDA   #0x12
       STA   EXTREG+1
       LDA   #1
       LDA   A,X
       CMPA  #0x12
       LBNE  OUTERR
       LBSR  CLRMEM
       LDA   #0x44
       STA   EXTREG+127
       LDA   #127
       LDA   A,X
       CMPA  #0x44
       LBNE  OUTERR
       RTS

; LDA B,Y
TAD7:   LDU   #LAD7
       LDY   #EXTREG
       LBSR  CLRMEM
       LDA   #0x34
       STA   EXTREG-1
       LDB   #-1
       LDA   B,Y
       CMPA  #0x34
       LBNE  OUTERR
       LBSR  CLRMEM
       LDA   #0xAA
       STA   EXTREG-128
       LDB   #-128
       LDA   B,Y
       CMPA  #0xAA
       LBNE  OUTERR
       RTS

; LDD D,X
TAD8:   LDU   #LAD8
       LDX   #0
       LBSR  CLRMEM
       LDD   #0x1289
       STD   EXTREG
       LDD   #EXTREG
       LDD   D,X
       CMPD  #0x1289
       LBNE  OUTERR
       LDX   #EXTREG
       LBSR  CLRMEM
       LDD   #0x2299
       STD   EXTREG
       LDD   #EXTREG-#EXTREG
       LDD   D,X
       CMPD  #0x2299
       LBNE  OUTERR
       RTS

; LDD n16,X
TAD9:   LDU   #LAD9
       LDX   #0
       LBSR  CLRMEM
       LDD   #0x1289
       STD   EXTREG
       LDD   EXTREG,X
       CMPD  #0x1289
       LBNE  OUTERR
       LDX   #EXTREG
       LBSR  CLRMEM
       LDD   #0x2299
       STD   EXTREG
       LDD   EXTREG-#EXTREG,X
       CMPD  #0x2299
       LBNE  OUTERR
       RTS

; LDA n8,PC
REG81:  .FCB   0x13
TADA:   LDU   #LADA
       LBSR  CLRMEM
;       LDA   #0x13
;       STA   REG81			;??? REG81 in ROM
       LDA   <REG81,PCR
       CMPA  #0x13
       LBNE  OUTERR
       LBSR  CLRMEM
;       LDA   #0x23
;       STA   REG82			;??? REG82 in ROM
       LDA   <REG82,PCR
       CMPA  #0x23
       LBNE  OUTERR
       RTS
REG82:  .FCB   0x23

REG161: .FDB   0x9876

; LDA n16,PC
TADB:   LDU   #LADB
       LBSR  CLRMEM
;       LDD   #0x9876
;       STD   REG161			;??? REG161 in ROM
       LDD   >REG161,PCR
       CMPD  #0x9876
       LBNE  OUTERR
       LBSR  CLRMEM
;       LDD   #0x5432
;       STD   REG162			;??? REG162 in ROM
       LDD   >REG162,PCR
       CMPD  #0x5432
       LBNE  OUTERR
       RTS

TADI1:  LDU   #LADI1
       LDX   #EXTREG
; LEAY [,X]
       LBSR  CLRMEM
       LDD   #0x5522
       STD   EXTREG
       LEAY  [,X]
       CMPY  #0x5522
       LBNE  OUTERR
; LEAY [1,X]
       LBSR  CLRMEM
       LDD   #0x1234
       STD   EXTREG+1
       LEAY  [1,X]
       CMPY  #0x1234
       LBNE  OUTERR
; LEAY [127,X]
       LBSR  CLRMEM
       LDD   #0x4444
       STD   EXTREG+127
       LEAY  [127,X]
       CMPY  #0x4444
       LBNE  OUTERR
; LEAY [-1,X]
       LBSR  CLRMEM
       LDD   #0x3456
       STD   EXTREG-1
       LEAY  [-1,X]
       CMPY  #0x3456
       LBNE  OUTERR
; LEAY [-128,X]
       LBSR  CLRMEM
       LDD   #0xAAAA
       STD   EXTREG-128
       LEAY  [-128,X]
       CMPY  #0xAAAA
       LBNE  OUTERR
       RTS

; LEAY [,X++]
TADI3:  LDX   #EXTREG
       LDU   #LADI3
       LBSR  CLRMEM
       LDD   #0xA55A
       STD   EXTREG
       LDD   #0x5AA5
       STD   EXTREG+2
       LEAY  [,X++]
       CMPY  #0xA55A
       LBNE  OUTERR
       LEAY  [,X++]
       CMPY  #0x5AA5
       LBNE  OUTERR
       RTS

; LEAY [,--X]
TADI5:  LDX   #EXTREG
       LDU   #LADI5
       LBSR  CLRMEM
       LDD   #0xA55A
       STD   EXTREG-2
       LDD   #0x789A
       STD   EXTREG-4
       LEAY  [,--X]
       CMPY  #0xA55A
       LBNE  OUTERR
       LEAY  [,--X]
       CMPY  #0x789A
       LBNE  OUTERR
       RTS

; LEAY [A,X]
TADI6:  LDU   #LADI6
       LDX   #EXTREG
       LBSR  CLRMEM
       LDD   #0x1234
       STD   EXTREG+1
       LDA   #1
       LEAY  [A,X]
       CMPY  #0x1234
       LBNE  OUTERR
       LBSR  CLRMEM
       LDD   #0x4444
       STD   EXTREG+127
       LDA   #127
       LEAY  [A,X]
       CMPY  #0x4444
       LBNE  OUTERR
       RTS

; LEAY [B,X]
TADI7:  LDU   #LADI7
       LDX   #EXTREG
       LBSR  CLRMEM
       LDD   #0x3456
       STD   EXTREG-1
       LDB   #-1
       LEAY  [B,X]
       CMPY  #0x3456
       LBNE  OUTERR
       LBSR  CLRMEM
       LDD   #0xAAAA
       STD   EXTREG-128
       LDB   #-128
       LEAY  [B,X]
       CMPY  #0xAAAA
       LBNE  OUTERR
       RTS

; LEAY [D,X]
TADI8:  LDU   #LADI8
       LDX   #0
       LBSR  CLRMEM
       LDD   #0x1289
       STD   EXTREG
       LDD   #EXTREG
       LEAY  [D,X]
       CMPY  #0x1289
       LBNE  OUTERR
       LDX   #EXTREG
       LBSR  CLRMEM
       LDD   #0x2299
       STD   EXTREG
       LDD   #EXTREG-#EXTREG
       LEAY  [D,X]
       CMPY  #0x2299
       LBNE  OUTERR
       RTS

; LEAY [n16,X]
TADI9:  LDU   #LADI9
       LDX   #0
       LBSR  CLRMEM
       LDD   #0x1289
       STD   EXTREG
       LEAY  [EXTREG,X]
       CMPY  #0x1289
       LBNE  OUTERR
       LDX   #EXTREG
       LBSR  CLRMEM
       LDD   #0x2299
       STD   EXTREG
       LEAY  [EXTREG-EXTREG,X]
       CMPY  #0x2299
       LBNE  OUTERR
       RTS

; LEAY [n8,PCR]
REGI81: .FDB   0x1357
TADIA:  LDU   #LADIA
       LBSR  CLRMEM
;       LDD   #0x1357
;       STD   REGI81		;??? REGI81 in ROM
       LEAY  [REGI81,PCR]
       CMPY  #0x1357
       LBNE  OUTERR
       LBSR  CLRMEM
;       LDD   #0x2345
;       STD   REGI82
       LEAY  [REGI82,PCR]	;??? REGI82 in ROM
       CMPY  #0x2345
       LBNE  OUTERR
       RTS
REGI82: .FDB   0x2345

; LEAY [n16,PC]
TADIB:  LDU   #LADIB
       LBSR  CLRMEM
;       LDD   #0x9876
;       STD   REG161			;??? REG161 in ROM
       LEAY  [REG161,PCR]
       CMPY  #0x9876
       LBNE  OUTERR
       LBSR  CLRMEM
;       LDD   #0x5432
;       STD   REG162			; ??? REG162 in ROM
       LEAY  [REG162,PCR]
       CMPY  #0x5432
       LBNE  OUTERR
       RTS

; LEAY [addr]
TADIC:  LDU   #LADIC
       LBSR  CLRMEM
;       LDD   #0x9876
;       STD   REG161			;??? REG161 in ROM
       LEAY  [#REG161]
       CMPY  #0x9876
       LBNE  OUTERR
       LBSR  CLRMEM
;       LDD   #0x5432
;       STD   REG162			;??? REG162 in ROM
       LEAY  [#REG162]
       CMPY  #0x5432
       LBNE  OUTERR
       RTS

REG162: .FDB   0x5432

LAD1:   .FCC   'LDA N8,X'
        .byte EOT
LAD2:   .FCC   'LDA ,X+'
        .byte EOT
LAD3:   .FCC   'LDD ,X++'
        .byte EOT
LAD4:   .FCC   'LDA ,-X'
        .byte EOT
LAD5:   .FCC   'LDD ,--X'
        .byte EOT
LAD6:   .FCC   'LDA A,X'
        .byte EOT
LAD7:   .FCC   'LDA B,Y'
        .byte EOT
LAD8:   .FCC   'LDD D,X'
        .byte EOT
LAD9:   .FCC   'LDD N16,X'
        .byte EOT
LADA:   .FCC   'LDA N8,PC'
        .byte EOT
LADB:   .FCC   'LDD N16,PC'
        .byte EOT
LADI1:  .FCC   'LEAY [n8,X]'
        .byte EOT
LADI3:  .FCC   'LEAY [,X++]'
        .byte EOT
LADI5:  .FCC   'LEAY [,--X]'
        .byte EOT
LADI6:  .FCC   'LEAY [A,X]'
        .byte EOT
LADI7:  .FCC   'LEAY [B,Y]'
        .byte EOT
LADI8:  .FCC   'LEAY [D,X]'
        .byte EOT
LADI9:  .FCC   'LEAY [N16,X]'
        .byte EOT
LADIA:  .FCC   'LEAY [N8,PCR]'
        .byte EOT
LADIB:  .FCC   'LEAY [N16,PCR]'
        .byte EOT
LADIC:  .FCC   'LEAY [ADDR]'
        .byte EOT


;**************************************************
; Print error message for a failed Test
; Parameters:
; U: Pointer to Mnemonic
;**************************************************
OUTERR:
		ldx	#0x3c88
		stx	curpos
		LDX   #ERRM1
		JSR   PSTRNG

		ldx	#0x3c99
		stx	curpos
		TFR   U,X
		JSR   PSTRNG

		ldb		#0x01
		stb		failed_6809

		ldb		#0x02		;did not pass the 6809 test suite
		jsr		set_LED

		;set color to red and loop
		jsr		load_palette_redbkg
	
		ldb		#watchdog_data
		jsr		delay_ffff
		jsr		delay_ffff
		jsr		delay_ffff
		jsr		clear_screen
		rts

	
ERRM1:  .FCC   'FAILED TEST: '
        .byte	EOT
PASSM1: .FCC   '      PASSED 6809 TEST SUITE'
        .byte	EOT
TITLEM1:.FCC   'WILLIAMS EMULATION TEST SUITE V0.5'
        .byte	EOT
BLITM1:	.FCC   '        BLITTER VALIDATION'
        .byte	EOT
INSTM1:	.FCC   '     INSTRUCTION TIMING TESTS'
        .byte	EOT
CRCBADM1:.FCC   '         BAD BLIT CRC'
        .byte	EOT
CRCOKM1:.FCC   '          ALL BLITS OK'
        .byte	EOT
BLITM2:	.FCC   '       BLITTER TIMING TESTS'
        .byte	EOT

;unused space from end of code to FFEF

	.area	_VECTORS				;CPU vectors at FFF0

	.word	#reset,#reset,#reset,#reset,#reset,#reset,#reset,#reset	;point them all to start of code

	.end
