SM590 dumping
9/12/2019
Sean Riddle

1  R00 is bit 0
2  R01 is bit 1
3  R02 is bit 2
4  R03 is bit 3
5  R33/CL2 1K pull-up
6  CL1 200kHz
7  ACL 1K pull-up
8  GND gnd

9  R10 is bit 4
10 R11 is bit 5
11 R12 is bit 6
12 R13 is bit 7
13 R20 1K pull-up
14 R21 1K pull-up
15 R22 1K pull-up
16 VCC vcc

Power up the chip, start the clock, lower ACL, then lower R21, then lower R20 and the ROM data should be output on R13:10 and R03:00.

If not, tie ACL, R21 and R20 high and try again.  The data will repeat in 508-byte groups, every 2032 CL1 clocks.

SM591 and SM595 might require changing fields somehow to get all data.

The dumped data starts at a random location.  Long runs of 00s might indicate the end of the dump.  The page and PC are zeroed
during ACL, so counting CL1 clocks after ACL goes low will likely allow locating the start of the dump.