LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

--serial ROM for testing Mitsubishi M50805 in external memory mode
--Altera EPM7064SLC
--www.seanriddle.com

ENTITY serialrom IS
	PORT(
		nReset:IN STD_LOGIC; --connected to /SYNC
		clock:IN STD_LOGIC;	--connected to DREQ
		dout:OUT STD_LOGIC	--connected to DTIN
		);
END serialrom;

ARCHITECTURE srarch OF serialrom IS
	TYPE sample IS ARRAY(0 TO 653) OF STD_LOGIC;

	CONSTANT ROM:sample:=(
		'0', --dummy value so that first clock outputs first bit of sample data
		
		--each line below is a frame
		'0','1','0','1','0','0','0','0','0','0','1','1','0','0','0','1','0','1','1','1','1','0','1','1','0','1','1','0','0','1','1','0','0','1','1','1','1','0','1','0','1','1','0','1','1','0','1',
		'1','0','0','1','0','0','0','0','0','1','0','0','0','0','1','0','0','1','1','1','1','0','0','1','0','0','1','1','0','1','1','1','0','1','1','1','1','0','1','0','1','1','0','1','0','1','1',
		'1','0','1','0','0','0','0','0','0','0','1','0','0','1','0','0','0','1','1','1','1','1','1','0','0','1','0','1','0','1','1','0','0','1','0','0','1','0','0','0','1','0','0','1','0','1','1',
		'1','0','1','1','1','0','0','0','0','0','1','0','0','1','0','0','1','0','1','1','1','1','1','1','0','1','1','1','1','0','0','1','0','1','0','1','1','0','0','0','0','1','1','1','0','1','1',
		'1','1','0','0','0','1','0','0','0','0','1','0',
		'1','1','0','0','1','0','0','0','0','0','1','1','0','1','0','0','1','0','1','1','1','0','1','1','0','1','1','1','1','0','1','1','0','1','0','1','1','1','1','1','1','0','0','0','1','0','1',
		'1','1','0','0','1','0','0','0','0','0','1','1','0','1','0','1','0','1','1','1','1','0','0','0','0','1','0','1','1','0','1','0','0','1','0','1','1','1','1','1','1','0','1','1','0','1','1',
		'1','1','0','0','0','0','0','0','0','1','0','0','0','1','0','0','1','1','1','1','1','0','0','1','0','1','0','0','1','0','1','1','0','1','1','1','1','1','1','1','0','1','1','0','1','1','0',
		'1','1','0','0','0','1','0','0','0','1','0','1',
		'1','1','0','1','0','0','0','0','0','1','1','1','0','1','0','0','1','0','1','1','1','0','0','0','0','1','0','0','1','0','1','1','1','0','0','0','1','1','0','1','0','1','0','1','1','0','0',
		'1','1','0','1','0','0','0','0','1','0','0','1','0','1','0','1','0','0','1','1','1','0','0','0','0','0','1','1','1','0','0','1','1','0','0','1','1','1','1','1','0','0','1','1','1','0','0',
		'1','1','0','0','1','1','0','0','1','1','1','0',
		'1','1','0','0','1','1','0','1','0','0','1','0',
		'1','0','1','1','1','1','0','1','1','0','0','0',
		'1','0','1','1','1','0','0','1','1','1','0','1','0','1','0','0','1','1','1','1','0','1','1','0','0','1','0','0','1','0','0','1','0','1','1','0','1','1','1','0','0','1','1','0','0','1','1',
		'1','0','1','0','0','1','1','0','0','0','0','1',
		'1','0','0','1','0','0','1','0','0','1','0','0','0','0','1','0','0','1','1','0','1','1','1','0','0','0','1','1','1','0','0','1','0','1','1','1','1','0','0','1','1','0','0','0','0','1','1',
		'0','1','1','1','0','1','1','0','0','1','1','0',
		'0','1','1','0','1','0','1','0','1','0','1','0','0','0','0','0','1','1','1','0','1','1','1','0','0','1','1','0','1','0','0','1','1','0','1','0','0','1','1','1','0','1','1','1','1','0','0',
		'1','1','1','1','1'
		);

		signal addr : std_logic_vector(9 downto 0):="0000000000";

	BEGIN
		PROCESS(clock,nReset,addr)
		BEGIN
			
			dout <= ROM(conv_integer(addr));
			
			if nReset = '0' then
				addr <= (others => '0');
			elsif RISING_EDGE(clock) THEN			
				addr <= addr + 1;
			end if;
		END PROCESS;
END srarch;