Family Trainer 3: Aerobics Studio Mitsubishi M50805 information Chip holds 8 samples. A sample is made up of frames sent every 12800 clocks (every 20ms at 640kHz). Sample #0 has 20 frames, #1 has 22, #2 has 29, #3 has 23, #4 has 16, #5 has 18, #6 has 25, #7 has 99. 7378 bits are used out of 960*8 = 7680, 96%. A frame is one of 3 lengths: full frame=47 bits, short frame=12 bits, null frame=5 bits. The last frame of every sample is an end frame, made up of 5 one bits. There is also a frame of 5 zero bits that might be a repeat frame. A frame is made up of up to 10 subframes. A full frame has all 10 subframes, a short frame has first 2 subframes, a null frame has first 1 subframe: sf0 is 120 clocks and has 5 DREQs sf1 is 132 clocks and has 7 DREQs sf2 is 128 clocks and has 6 DREQs sf3 is 136 clocks and has 6 DREQs sf4 is 128 clocks and has 4 DREQs sf5 is 128 clocks and has 4 DREQs sf6 is 128 clocks and has 4 DREQs sf7 is 128 clocks and has 4 DREQs sf8 is 132 clocks and has 4 DREQs sf9 is ??? clocks and has 3 DREQs A null frame is indicated by sf0 being 11111 for an end frame or 00000 for a repeat? frame. A short frame is indicated by the first bit of sf1 being 1. Below is a CSV of the ROM contents by frame, followed by VHDL for a serial ROM that supplies sound 0 data in external memory mode. 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7,95,"01111001101001000011101101010110001011001100010","01111","0011010","010000","111011","0101","0110","0010","1100","1100","010" 7,96,"010111011110","01011","1011110","","","","","","","","" 7,97,"01010010000000111011011010000111001101011101100","01010","0100000","001110","110110","1000","0111","0011","0101","1101","100" 7,98,"11111","11111","","","","","","","","","" LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; --serial ROM for testing Mitsubishi M50805 in external memory mode --Altera EPM7064SLC --www.seanriddle.com ENTITY serialrom IS PORT( nReset:IN STD_LOGIC; --connected to /SYNC clock:IN STD_LOGIC; --connected to DREQ dout:OUT STD_LOGIC --connected to DTIN ); END serialrom; ARCHITECTURE srarch OF serialrom IS TYPE sample IS ARRAY(0 TO 653) OF STD_LOGIC; CONSTANT ROM:sample:=( '0', --dummy value so that first clock outputs first bit of sample data --each line below is a frame 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'1','0','1','1','1','0','0','1','1','1','0','1','0','1','0','0','1','1','1','1','0','1','1','0','0','1','0','0','1','0','0','1','0','1','1','0','1','1','1','0','0','1','1','0','0','1','1', '1','0','1','0','0','1','1','0','0','0','0','1', '1','0','0','1','0','0','1','0','0','1','0','0','0','0','1','0','0','1','1','0','1','1','1','0','0','0','1','1','1','0','0','1','0','1','1','1','1','0','0','1','1','0','0','0','0','1','1', '0','1','1','1','0','1','1','0','0','1','1','0', '0','1','1','0','1','0','1','0','1','0','1','0','0','0','0','0','1','1','1','0','1','1','1','0','0','1','1','0','1','0','0','1','1','0','1','0','0','1','1','1','0','1','1','1','1','0','0', '1','1','1','1','1' ); signal addr : std_logic_vector(9 downto 0):="0000000000"; BEGIN PROCESS(clock,nReset,addr) BEGIN dout <= ROM(conv_integer(addr)); if nReset = '0' then addr <= (others => '0'); elsif RISING_EDGE(clock) THEN addr <= addr + 1; end if; END PROCESS; END srarch;